GPU accelerated matrix cover algorithm for multiple patterning layout decomposition

Abstract

Multiple patterning lithography (MPL) is regarded as one of the most promising ways of overcoming the resolution limitations of conventional optical lithography due to the delay of next-generation lithography technology. As the feature size continues to decrease, layout decomposition for multiple patterning lithography (MPLD) technology is becoming increasingly crucial for improving the manufacturability in advanced nodes. The decomposition process refers to assigning the layout features to different mask layers according to the design rules and density requirements. When the number of masks k ≥ 3, the MPLD problems are N P-hard and thus may suffer from runtime overhead for practical designs. However, the number of layout patterns is increasing exponentially in industrial layouts, which hinders the runtime performance of MPLD models. In this research, we substitute the CPU’s dance link data structure with parallel GPU matrix operations to accelerate the solution for exact coverbased MPLD algorithms. Experimental results demonstrate that our system is capable of full-scale, lightningfast layout decomposition, which can achieve more than 10× speed-up without quality degradation compared to state-of-the-art layout decomposition methods.

Open-source differentiable lithography imaging framework

“…As lithographic techniques embarked on a trajectory toward diminishing technology nodes, correction strategies witnessed iterative refinements. The subsequent epoch saw an escalating reliance on resolution enhancement techniques (RETs), [27][28][29] including but not limited to, the meticulous optimization of illumination conditions, sub-resolution assist feature (SRAF), multiple patterning and OPC. Pivotal breakthroughs, such as source mask optimization (SMO) 30 and the avant-garde inverse lithography technique (ILT) that emerged around 2010, propelled computational lithography into an unprecedented echelon.…”