GPU Computations and Memory Access Model Based on Petri Nets

Gogolinska, Anna; Mikulski, Łukasz; Piatkowski, Marcin

doi:10.1007/978-3-662-58381-4_7

Cited by 5 publications

(7 citation statements)

References 10 publications

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“…Hence, if one is interested only in estimating the number of clock cycles required to run an application, it is sufficient to properly set this parameter. This approach is consistent with other works on GPU stochastic modeling, discussed in Section 2.2 [20], [21]. For a resource-oriented analysis, it is also possible to estimate metrics for each hardware resource represented in our model.…”

Section: Model's Settingsupporting

confidence: 73%

“…The predictions for the Quadro RTX 6000 instead are better, with an average error of 4%. A decrease in accuracy as the workload size increases is also observable in [20], [21], to the best of our knowledge, the only works that try to model the internal structure of a GPU. However, the work in [21] does not focus on estimating the number of clock cycles required by a given application, hence we compare our results with those in [20].…”

Section: Final Discussion and Conclusionmentioning

confidence: 90%

“…A decrease in accuracy as the workload size increases is also observable in [20], [21], to the best of our knowledge, the only works that try to model the internal structure of a GPU. However, the work in [21] does not focus on estimating the number of clock cycles required by a given application, hence we compare our results with those in [20]. The authors of [20] estimate the number of clock cycles on an implementation of the GEMM algorithm.…”

Section: Final Discussion and Conclusionmentioning

confidence: 90%

“…However, the model is not generalizable to other GPUs, nor to other applications, as the behavior of the program is embedded in the net so, in order to evaluate different programs, the model should be manually modified. In [21] bounded Petri nets are used to count the computational and memory operations performed on a GPU, based on the NVIDIA's CUDA programming model where memory is logically partitioned in shared, local, and global. To test the model, the authors use a pseudocode of an algorithm as input and compare the number of steps of the model's execution against the real kernel execution time on the GPU.…”

Section: Related Workmentioning

confidence: 99%

“…Thanks to the use of the NVIDIA Nsight profiler, it is also possible to know how many times a specific instruction was executed. This is extremely useful to provide a realistic and faithful representation of the program's execution, to handle situations such as branch divergency, and it can also be obtained from static code analysis as shown in [20], [21]. Each SASS instruction is associated to an identifier representing the kind of operation, e.g., ALU operation or Load/Store.…”

Section: Program Representationmentioning

confidence: 99%

See 4 more Smart Citations

Modeling of GPGPU architectures for performance analysis of CUDA programs

Terrosi,

Mariotti,

Lollini

et al. 2023

2023 IEEE 23rd International Conference on Software Quality, Reliability, and Security (QRS)

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Graphics Processing Units (GPUs), originally developed for computer graphics, are now commonly used to accelerate parallel applications. Given that GPUs are designed to be as efficient as possible, evaluating their performance is crucial. This problem has been tackled in the last years by researchers that started to propose solutions such as analytical models and digital simulators, which are, however, often complex to use and/or to adapt to the needs of the user. Thanks to its high flexibility, model-based analysis is widely used to evaluate systems' properties, including performance. Researchers started working on developing GPU models that can represent both their architecture and the software in execution, but they often use strong assumptions that undermine their usability. In this work we develop a Stochastic Activity Network model to evaluate the performance of CUDA applications running on NVIDIA GPUs. The model takes as input a representation of the program's instruction, parsed from the CUDA SASS assembly file, and a list of parameters to offer configurability to the user. We tune our model to match the architecture of two different NVIDIA GPUs and simulate the execution of a CUDA program. We then compare the results with those obtained from the execution of the program over the real GPUs.

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Section: Model's Settingsupporting

confidence: 73%

Section: Final Discussion and Conclusionmentioning

confidence: 90%

Section: Final Discussion and Conclusionmentioning

confidence: 90%

Section: Related Workmentioning

confidence: 99%

Section: Program Representationmentioning

confidence: 99%

See 3 more Smart Citations

Modeling of GPGPU architectures for performance analysis of CUDA programs

Terrosi,

Mariotti,

Lollini

et al. 2023

2023 IEEE 23rd International Conference on Software Quality, Reliability, and Security (QRS)

View full text Add to dashboard Cite

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An Efficient GPU Parallelization of the Jaya Optimization Algorithm and Its Application for Solving Large Systems of Nonlinear Equations

Silva,

Lopes

2024

Communications in Computer and Information Science

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Comparison of sort algorithms in Hadoop and PCJ

Nowicki

2020

J Big Data

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Sorting algorithms are among the most commonly used algorithms in computer science and modern software. Having efficient implementation of sorting is necessary for a wide spectrum of scientific applications. This paper describes the sorting algorithm written using the partitioned global address space (PGAS) model, implemented using the Parallel Computing in Java (PCJ) library. The iterative implementation description is used to outline the possible performance issues and provide means to resolve them. The key idea of the implementation is to have an efficient building block that can be easily integrated into many application codes. This paper also presents the performance comparison of the PCJ implementation with the MapReduce approach, using Apache Hadoop TeraSort implementation. The comparison serves to show that the performance of the implementation is good enough, as the PCJ implementation shows similar efficiency to the Hadoop implementation.

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GPU Computations and Memory Access Model Based on Petri Nets

Cited by 5 publications

References 10 publications

Modeling of GPGPU architectures for performance analysis of CUDA programs

Modeling of GPGPU architectures for performance analysis of CUDA programs

An Efficient GPU Parallelization of the Jaya Optimization Algorithm and Its Application for Solving Large Systems of Nonlinear Equations

Comparison of sort algorithms in Hadoop and PCJ

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