GPU-FPGA Heterogeneous Computing with OpenCL-Enabled Direct Memory Access

Kobayashi, Ryohei; Fujita, Norihisa; Yamaguchi, Yoshiki; Nakamichi, Ayumi; Boku, Taisuke

doi:10.1109/ipdpsw.2019.00090

Cited by 18 publications

(5 citation statements)

References 10 publications

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“…Field‐Programmable Gate Arrays (FPGAs) provide an alternative platform on which to rapidly prototype alternative hardware architectures. The use of FPGAs gives event‐based computing clusters more flexibility in the applications that can be run: If the application will not fit onto a single FPGA, then multiple FPGAs can be networked together more effectively than the equivalent GPGPU system [24]. GPGPU approaches are significantly less energy‐efficient than equivalent FPGA solutions [25].…”

Section: Event‐based Computingmentioning

confidence: 99%

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Event‐based high throughput computing: A series of case studies on a massively parallel softcore machine

Vousden

Morris

Bragg

et al. 2022

IET Computers & Digital Tech

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This paper introduces an event‐based computing paradigm, where workers only perform computation in response to external stimuli (events). This approach is best employed on hardware with many thousands of smaller compute cores with a fast, low‐latency interconnect, as opposed to traditional computers with fewer and faster cores. Event‐based computing is timely because it provides an alternative to traditional big computing, which suffers from immense infrastructural and power costs. This paper presents four case study applications, where an event‐based computing approach finds solutions to orders of magnitude more quickly than the equivalent traditional big compute approach, including problems in computational chemistry and condensed matter physics.

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Section: Event‐based Computingmentioning

confidence: 99%

“…If the application will not fit onto a single FPGA, then multiple FPGAs can be networked together more effectively than the equivalent GPGPU system [24].…”

Section: Event‐based Computingmentioning

confidence: 99%

Event‐based high throughput computing: A series of case studies on a massively parallel softcore machine

Vousden

Morris

Bragg

et al. 2022

IET Computers & Digital Tech

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“…Their main targets are the Bing search engine and AI applications in which the streaming data are transferred between FPGA boards in the order of connection. Some FPGA supercomputers use a PCIe network for interconnection between FPGAs and GPUs [21], [22]. High-speed serial links of more than 40 Gbps are also used [2]- [4] between FPGA boards.…”

Section: Interconnection Network Of Multi-fpga Systemsmentioning

confidence: 99%

Improving the Performance of Circuit-Switched Interconnection Network for a Multi-FPGA System

Ito

Iizuka

Hironaka

et al. 2021

IEICE Trans. Inf. & Syst.

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“…Our framework address the other use cases, not compliant with Ethernet or Infiniband links. Many authors have proposed frameworks leveraging different GPU accelerators and programming API such as AMD/OpenCL [2] or GPUDirect/CUDA [3].…”

Section: State Of the Artmentioning

confidence: 99%

Online GPUAnalysis using Adaptive DMA Controlled by Softcore for 2D Detectors

Ponsard

Janvier

Houzet

et al. 2020

2020 23rd Euromicro Conference on Digital System Design (DSD)

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New generation X-ray detectors enables cutting-edge experiments that can produce very high throughput data streams that are challenging to manage and store. This paper presents an evaluation of a configurable data placement mechanism from an FPGA device collecting detector raw data to a burst-cache memory and concurrently to a GPU accelerator, bypassing hardware and software extraneous copies and bottlenecks via PCI-Express. It includes a DMA controller dynamically configured in real-time by a Microblaze soft-processor. A low-latency synchronization mechanism using GPUDirect technology is presented as well. Multi-GB, DMAable memory buffer allocation, leveraging Linux contiguous memory allocator is investigated. As illustrative workloads, real-time raw-data correction as foreseen in Serial Synchrotron X-ray experiments were processed. Obtained results showed that if one could reach a data throughput of 12.7GB/s to CPU memory when using PCIe gen3 x16, a 12-cores OpenMP CPU application processes the raw data only up to 2.7GB/s and is outperformed by a GPU accelerator (NVIDIA RTX 6000).

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GPU-FPGA Heterogeneous Computing with OpenCL-Enabled Direct Memory Access

Cited by 18 publications

References 10 publications

Event‐based high throughput computing: A series of case studies on a massively parallel softcore machine

Event‐based high throughput computing: A series of case studies on a massively parallel softcore machine

Improving the Performance of Circuit-Switched Interconnection Network for a Multi-FPGA System

Online GPUAnalysis using Adaptive DMA Controlled by Softcore for 2D Detectors

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