GPUs and chaos: a new true random number generator

Teh, Je Sen; Samsudin, Azman; Almazrooie, Mishal; Akhavan, Amir

doi:10.1007/s11071-015-2287-7

Cited by 31 publications

(18 citation statements)

References 40 publications

(44 reference statements)

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“…Random number generators can be broadly classi ed into two categories [32,78,145,148]: 1) pseudo-random number generators (PRNGs) [18,98,100,102,133], which deterministically generate numbers starting from a seed value with the goal of approximating a true random sequence, and 2) true random number generators (TRNGs) [6,16,22,23,24,33,36,47,50,55,56,57,65,77,83,96,101,111,116,119,141,143,144,146,149,151,153,155,158], which generate random numbers based on sampling non-deterministic random variables inherent in various physical phenomena (e.g., electrical noise, atmospheric noise, clock jitter, Brownian motion).…”

Section: Introductionmentioning

confidence: 99%

D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput

Kim

Patel

Hassan

et al. 2019

2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)

105

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We propose a new DRAM-based true random number generator (TRNG) that leverages DRAM cells as an entropy source.The key idea is to intentionally violate the DRAM access timing parameters and use the resulting errors as the source of randomness. Our technique speci cally decreases the DRAM row activation latency (timing parameter t RCD ) below manufacturerrecommended speci cations, to induce read errors, or activation failures, that exhibit true random behavior. We then aggregate the resulting data from multiple cells to obtain a TRNG capable of providing a high throughput of random numbers at low latency.To demonstrate that our TRNG design is viable using commodity DRAM chips, we rigorously characterize the behavior of activation failures in 282 state-of-the-art LPDDR4 devices from three major DRAM manufacturers. We verify our observations using four additional DDR3 DRAM devices from the same manufacturers. Our results show that many cells in each device produce random data that remains robust over both time and temperature variation. We use our observations to develop D-RaNGe, a methodology for extracting true random numbers from commodity DRAM devices with high throughput and low latency by deliberately violating the read access timing parameters. We evaluate the quality of our TRNG using the commonly-used NIST statistical test suite for randomness and nd that D-RaNGe: 1) successfully passes each test, and 2) generates true random numbers with over two orders of magnitude higher throughput than the previous highest-throughput DRAM-based TRNG.

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Section: Introductionmentioning

confidence: 99%

D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput

Kim

Patel

Hassan

et al. 2019

2019 IEEE International Symposium on High Performance Computer Architecture (HPCA)

105

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“…A serious problem of TRNG structures is that they require post-processing [8], [14], [25]- [28]. The aim of the postprocessing is to eliminate the statistical dependence between the obtained data.…”

Section: Performance Comparisons and Discussionmentioning

confidence: 99%

“…The first approach is based on discrete time chaotic systems. As it can be seen in [8], [13]- [15], [18], [19], [29]- [32], the systems used in these RNG designs are low-dimensional chaotic systems. These designs are faster, but their reliability is questionable.…”

Section: Performance Comparisons and Discussionmentioning

confidence: 99%

A Novel Random Number Generator Based on Fractional Order Chaotic Chua System

Özkaynak¹

2020

ELEKTRON ELEKTROTECH

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One of the practical applications of chaotic systems is the design of a random number generator. In the literature, generally random number generators are designed using discrete time chaotic systems. The reason for the use of the discrete time chaotic systems in the design architecture is that the latter have a simpler structure than the continuous time chaotic systems. In order to observe chaos in continuous time systems, the system must have at least three degrees. It is shown that for fractional order chaotic systems chaos can be observed even in a lower system degree. The aim of this study is to develop a random number generator using a fractional order chaotic Chua system. The proposed generator is analysed using various randomness tests. The analysis results show that the proposed generator passes the random requirements successfully. On the one hand, this study is important because it demonstrates the practical application of fractional order chaotic systems. On the other hand, it provides an alternative to designs based on discrete time chaotic systems.

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“…To satisfy the SAC, each individual output bit should change with a probability of 50% when a single input bit is toggled. Similar to the previous test, 2 8 possible inputs are first divided into 2 7 pairs, ( , ), which differ only in bit . The 8-bit avalanche vectors, are then calculated for all (0 ≤ < 8).…”

Section: Avalanche and Strict Avalanche Criterionmentioning

confidence: 99%

“…Due to the existence of efficient and uniformly distributed software-based TRNGs, it is feasible to utilize true random numbers in cryptographic algorithms. These TRNGs take advantage of physical phenomena that occur within computing hardware such as multicore processors [7], graphics processing units [8], or hard disks [9] and quantifies them to generate nondeterministic numbers. As the inputs of AEAD schemes include secret and public message numbers, TRNGs can be implemented to generate secret message numbers to provide immunity to statisticalbased cryptanalysis.…”

Section: Introductionmentioning

confidence: 99%

A Chaos-Based Authenticated Cipher with Associated Data

Teh

Samsudin

2017

Security and Communication Networks

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In recent years, there has been a rising interest in authenticated encryption with associated data (AEAD) which combines encryption and authentication into a unified scheme. AEAD schemes provide authentication for a message that is divided into two parts: associated data which is not encrypted and the plaintext which is encrypted. However, there is a lack of chaos-based AEAD schemes in recent literature. This paper introduces a new 128-bit chaos-based AEAD scheme based on the single-key Even-Mansour and Type-II generalized Feistel structure. The proposed scheme provides both privacy and authentication in a single-pass using only one 128-bit secret key. The chaotic tent map is used to generate whitening keys for the Even-Mansour construction, round keys, and random s-boxes for the Feistel round function. In addition, the proposed AEAD scheme can be implemented with true random number generators to map a message to multiple possible ciphertexts in a nondeterministic manner. Security and statistical evaluation indicate that the proposed scheme is highly secure for both the ciphertext and the authentication tag. Furthermore, it has multiple advantages over AES-GCM which is the current standard for authenticated encryption.

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GPUs and chaos: a new true random number generator

Cited by 31 publications

References 40 publications

D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput

D-RaNGe: Using Commodity DRAM Devices to Generate True Random Numbers with Low Latency and High Throughput

A Novel Random Number Generator Based on Fractional Order Chaotic Chua System

A Chaos-Based Authenticated Cipher with Associated Data

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