Graphene functionalization and seeding for dielectric deposition and device integration

Abstract

Graphene has recently attracted wide-spread attention because of its unique transport and physical properties that are appealing for a wide range of electronic applications. Integration with scalable high-κ dielectrics is important for the realization of graphene-based top-gated electronic devices, including next generation THz applications. Atomic layer deposition (ALD), a low temperature deposition method based on two separate self-limiting surface reactions, is a preferred technique to achieve high-quality, conformal, ultrathin dielectric films with precise control of thickness and chemical composition at the atomic scale. Unfortunately, ALD of oxides on graphene is hindered by the inertness of the graphene surface. To alleviate this graphene-oxide incompatibility, several different functionalization and seeding methods have recently been developed to render the graphene more susceptible to the ALD process of high-κ dielectrics including: ozone, wet chemical and fluorine pretreatments, low-k polymer seed, e-beam metal, and oxide seed layers. The ability of each approach to enable conformal, uniform high-κ dielectrics on graphene while maintaining its inherent transport properties for low power, high-frequency device applications is discussed.

Interface engineering for high performance graphene electronic devices

“…However, the basal plane of graphene has few dangling bonds [110][111][112][113], which are necessary to induce the surface reaction of precursors in the ALD process [114][115][116]. This unique feature of the graphene surface results in irregular and poor film formation of ALD-dielectrics on pristine graphene [111,113,117]. ALD-dielectrics with a rough surface and many pin-holes cause high leakage current, low breakdown voltage, and extrinsic scattering of charge carriers at the graphene/high-k dielectric interface in graphene FETs.…”

Integration of ammonia-plasma-functionalized graphene nanodiscs as charge trapping centers for nonvolatile memory applications

“…4(f), by the hydrophobic nature of graphene surface for the Au-NP formation [47]. To enhance the program and erase characteristics, the optimization of GND size and density for a larger perimeter to area ratio could be performed by the modification of graphene surface to be more hydrophilic [47,48]. Fig.…”

Epitaxial Graphene

“…Recently, an entire journal issue was devoted to graphene synthesis, properties, and devices [29]. With regard to device processing, dielectric deposition on graphene is difficult due to the lack of dangling bonds, and methods to overcome this are discussed by Garces [30].…”