Graphics processing unit-accelerated joint-bitplane belief propagation algorithm in DSC

Abstract

The M-ary source with nonstationary correlation can be encoded with a single binary low-density parity-check (LDPC) code and decoded together in distributed source coding. The joint-bitplane belief propagation (JBBP) is a useful decoding algorithm for multiple bitplanes of an M-ary source. However, it suffers from the drawbacks of low computational efficiency and long execution time. Motivated by the evolution of the Graphics Processing Unit (GPU) and the inherent parallel characteristic of the JBBP, we propose a novel approach for the computationally intensive processing of the JBBP algorithm on GPU using the compute unified device architecture programming model. Two different parallel modes are utilized for the belief passing between different nodes of the JBBP. It is found that the bottlenecks of the JBBP lie in computing the overall probability mass functions (pmfs) of symbol nodes and the overall beliefs of bit nodes. Thus, a data partitioning method is leveraged to split a large array of pmfs into small pieces which can be loaded into L1 cache instead of global memory. The optimal block size is selected which not only assigns as large L1 cache as possible for individual thread, but also guarantees multiple active warps in each stream multiprocessor. Experimental results show that when the length-6336 (length-50,688, resp.) LDPC accumulate (LDPCA) code is used to compress the source, the JBBP decoder can achieve about 20× (41×, resp.) speedup on GPU compared with the original C code on CPU. Better performance would be further obtained with longer LDPCA codes. Moreover, the parallel JBBP is also applied in hyperspectral image compression and video coding and it shows good speedup performance. B Yong Fang

Symbol positions‐based Slepian–Wolf coding with application to distributed video coding

“…Owing to this, the attempts to realise real‐time DVC propositions were limited to the use of simple SI [4, 20] or to use only small images [4] and a simple rate control [20]. In addition, large calculation resources are used at the decoder to reduce the SW decoding time [19, 20, 21].…”

A Systematic Review of Hardware-Accelerated Compression of Remotely Sensed Hyperspectral Images

“…Studies using benchmarking with the Indian Pines image are presented in Table 14 . Using a GPU card for acceleration, the highest lossy CR value was reached at 3.2 based on an adaptive predictive LCE algorithm [ 101 ]. With a heavy power requirement of 225 Watts, it yields a throughput of 100 MSps.…”

“…Compressive sensing has caught the attention of more researchers as nine of the studies fall under the CS category. Finally, only two relevant studies each for the categories of DSC-based [ 100 , 101 ] and VQ-based [ 32 , 37 ] were identified in this review. Figure 9 shows a hierarchical categorization of the compression algorithms according to the algorithm class.…”

“…Prediction-based algorithms utilizing the DSC technique are studied in [ 100 , 101 ]. DSC is accelerated using VHDL on Xilinx Virtex-4 FPGA in [ 100 ].…”

“…A throughput of 80 MSps is achieved, and compression ratios ranging from 2.4 to 3.5 for raw and calibrated AVIRIS images, respectively, are obtained. DSC is also employed in [ 101 ]. Here, the sources are encoded using Low-Density Parity-Check (LDPC) codes and jointly decoded with the joint Bit-Plane Belief Propagation (JBBP) algorithm.…”