Abstractlevel modeling (TLM) aims at abstract description and highperformance simulation of bus-based System-on-Chip (SoC) platforms. While available, there is ongoing discussion on modeling styles for their usage. This contribution employs object-oriented modeling of transaction data and bus protocols, targeting at better extensibility and reuse of models. Our simulation perKeywords: Transaction-Level Modeling, SystemC, Object-Oriented, Embedded Systems
INTRODUCTIONEmbedded systems and systems on chip integrate an increasing number of processor nodes and complex communication structures. It is an essential design task to model these systems prior to their implementation. This enables an early validation of system architecture concepts, exploration of architectural alternatives, and performance evaluation. Modeling on register transfer level (RTL) is no longer an option due to the complexity, inflexibility, and low simulation performance of the resulting models. Transaction level modeling has been devised as an alternative.One key principle of TLM is to perform communication by function calls rather than via signal communication. The other is to exchange information on a coarser level of granularity compared to low-level signals. With these constraints, bus based systems can be described at different TLM abstraction representations, a cycle-accurate object-oriented model can achieve perforTransaction formance measurements show that by abstracting from signal-level data