Grid Synchronisation Based on Frequency-Locked Loop Schemes

Martinez‐Rodriguez

et al. 2017

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Summary This paper presents the design of a current reference used in an inverter‐side current controller for a grid‐connected single‐phase transformerless inverter with an Inductive‐Capacitive‐Inductive of LCL filter. The idea is to indirectly control the inverter‐side current, by directly acting on the grid‐side current. Furthermore, it can be shown that the simple proportional term guarantees damping injection. However, the design of the current reference for such a controller is a more involved process, which turns out to be even more challenging in the case where the grid voltage signal is subject to harmonic distortion. In this case, the distortion propagates into the converter through the LCL filter. Therefore, an inverter‐side current reference must be proposed to be as distorted as necessary to assure indirect tracking of the grid‐side current towards its corresponding reference, which is built as a sinusoidal with a given phase displacement to allow reactive current injection. The inverter‐side controller must then include a harmonic compensation mechanism, to assure perfect tracking of the inverter‐side current towards its distorted reference, and thus, achieve an adequate performance under harmonic distortion. Experiments are performed in a prototype to evaluate the performance of the proposed controller.

Section: Inverter-side Current Loop Designmentioning

confidence: 99%

Design of an inverter-side current reference and controller for a single-phase LCL-based grid-connected inverter

Martinez‐Rodriguez

et al. 2017

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“…This is supported by the fact that the dynamics of the inductor current is presumably faster than the dynamics of the capacitor *A phase-locked loop (PLL) structure, as the one proposed in Escobar et al, 26 can be used to obtain signal u G,1 . This is supported by the fact that the dynamics of the inductor current is presumably faster than the dynamics of the capacitor *A phase-locked loop (PLL) structure, as the one proposed in Escobar et al, 26 can be used to obtain signal u G,1 .…”

Section: Design Of the Controllermentioning

confidence: 99%

“…For the lower arm, the initial capacitor voltages were fixed at u C4 (0) = 260 V, u C5 (0) = 240 V, and u C6 (0) = 160 V, which not only are different among each other, but also their sum produces a voltage of u L (0) = 660 V, ie, u L starts 60 V below its reference (720 V). Moreover, these figures also show the activation effect of the fundamental compensation terms (23) and (26), also referred as the harmonic compensation mechanisms (HCM). From Figures 9A,B, the natural balance mechanism (due to the PSC-PWM scheme) on the MMC-based inverter cells can be observed, as all u Cj s approach nearly the same value.…”

Section: Unbalance In Capacitor Voltagesmentioning

confidence: 99%

“…The design of the controller can be realized separately in two stages: Current and energy (or voltage) stages. This is supported by the fact that the dynamics of the inductor current is presumably faster than the dynamics of the capacitor *A phase-locked loop (PLL) structure, as the one proposed in Escobar et al, 26 can be used to obtain signal u G,1 .…”

Section: Design Of the Controllermentioning

confidence: 99%

“…Figures 10A,B show the startup responses of the phase total voltage u C and the voltage difference between the upper and the lower arms u D , starting from the aforementioned initial capacitor voltages conditions. Moreover, these figures also show the activation effect of the fundamental compensation terms (23) and (26), also referred as the harmonic compensation mechanisms (HCM). Both HCM are enabled 2 seconds after the controller has started.…”

Section: Unbalance In Capacitor Voltagesmentioning

confidence: 99%

See 2 more Smart Citations

A model‐based controller for a single‐phase grid‐tied modular multilevel inverter with regulation and balance of energy

Contreras

Fernández

et al. 2019

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Summary A controller based on the model is presented for a single‐phase grid‐tied inverter of 2N + 1 levels, which is based on the modular multilevel converter (MMC) topology, where N is the number of cells per arm. This is referred to as an MMC‐based inverter in this paper. The controller has the purpose to assure a good performance of the converter operation both internally and during grid connection. For this, the proposed controller involves four control loops, namely, overall energy regulation, energy balance between arms, circulating current, and injected current loops. Notice that the proposed controller by itself guarantees voltage regulation at the arms level only. To guarantee individual regulation of each cell capacitor voltage, the proposed controller is then combined with the phase‐shifted carrier‐based pulse‐width modulation (PSC‐PWM) scheme. Experimental evidence is exposed to assess the performance of the proposed control scheme. The experimental setup considers a grid‐tied inverter based on an MMC of seven levels (N = 3). The proposed controller and the experimental prototype are implemented in a hardware‐in‐the‐loop platform. The experimental tests include responses to step changes in the load power and unbalance in the initial capacitor voltages.

A current controller for the modular multilevel converter operating under distorted grid voltage

Contreras

Fernández

et al. 2018

Self Cite

This paper presents a current controller for the single-phase grid-connected modular multilevel converter of 2n + 1 levels. The controller is designed based on the mathematical model of the converter. It has the aim of injecting an almost pure sinusoidal current with a proper phase, despite the low-frequency harmonics present on the grid voltage. Also, a loop for the circulating current is developed to keep this variable close to a constant value for proper internal operation of the converter. The overall current controller comprises injected and circulating current loops. Out of these loops, a voltage reference for each converter arm is built, which is then used in a phase-shift carrier-based pulse-width modulation to generate the switching sequences. These are then used to command the modules conforming the converter. Experimental results in a 7-level modular multilevel converter (n = 3) operating under harmonic distortion in the grid voltage are obtained from a hardware-in-the-loop test bench to validate the performance of the proposed current controller. n, number of cells in one arm of MMC; L, inductance of each arm; i P , i N , upper and lower arm currents; E, DC-link voltage value; v S , distorted grid voltage; e P , e N , total inserted voltage for the upper and the lower arms; v Ci , i-th (i ∈ 1, … , 2n) capacitor voltage of MMC; u i , i-th switching signal of MMC; C, capacitors' capacitance; z i , capacitors' scaled energy; i 0 , injected current to the AC side; e D , difference between the produced voltages of the lower and the upper arms; i T , circulating current; e T , total voltage produced by the upper and lower cells; z P , z N , upper and lower cells' scaled energy; z T , total scaled energy stored in the upper and the lower cells; z D , difference between the scaled energy of the upper and the lower cells; 0 , fundamental frequency of the grid voltage; i * 0 , reference for the injected current; P 0 , constant load power reference; v S,RMS , RMS value of the grid voltage;v S,1 , estimation of the grid voltage fundamental component; t, time; i * T , reference for the circulating current; e * D , e * T , steady-state expressions for e D and e T ;ĩ 0 , error of the injected current loop; D , harmonic disturbance in the injected current loop; R D , damping gain of the injected current loop;̂D, estimate for the harmonic perturbations grouped in D ; k, odd harmonics number; D,k , estimation gains for the resonant filters; s, complex variable; f 0 , fundamental frequency (in Hz) of the grid voltage; T kr , desired response time for each harmonic component; i0