Grown-film silicon transistors on sapphire

Mueller, C. W.; Robinson, Paul H.

doi:10.1109/proc.1964.3436

Cited by 61 publications

(15 citation statements)

References 3 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Silicon-on-Sapphire (SOS). SOS is the first SOI technology that has received practical application [62,63]. At that time, the main motivation for the development of the SOS technology was fabrication of radiation-hard CMOS ICs.…”

Section: Methods For Fabricating Soi Wafersmentioning

confidence: 99%

The advancement of silicon-on-insulator (SOI) devices and their basic properties

Rudenko¹,

Nazarov²,

Lysenko³

2020

SPQEO

View full text Add to dashboard Cite

Silicon-on-insulator (SOI) is most promising present-day silicon technology. The use of SOI provides significant benefits over traditional bulk silicon technology in fabrication of many integrated circuits (ICs), and in particular, complementary metal-oxidesemiconductor (CMOS) ICs. It also allows extending the miniaturization of CMOS devices into the nanometer region. In this review paper, we briefly describe evolution of SOI technology and its main areas of application. The basic technological methods for fabrication of SOI wafers are presented. The principal advantages of SOI devices over bulk silicon devices are described. The types of SOI metal-oxide-semiconductor field-effect transistors (MOSFETs) and their basic electrical properties are considered.

show abstract

Section: Methods For Fabricating Soi Wafersmentioning

confidence: 99%

The advancement of silicon-on-insulator (SOI) devices and their basic properties

Rudenko¹,

Nazarov²,

Lysenko³

2020

SPQEO

View full text Add to dashboard Cite

show abstract

“…The devices described in this thesis are silicon (21) insulated-gate field-effect TFTs v "' fabricated by evaporation on sapphire substrates. These devices are similar in structure to Weimer's TFTs and possess the common advantage of being fabricated by the same techniques used in the production of passive thin film circuits.…”

Section: Thin-film Field-effect Transistorsmentioning

confidence: 99%

Evaporated silicon thin-film transistors

1969

Microelectronics Reliability

View full text Add to dashboard Cite

In presenting this thesis in partial fulfilment of the requirements for an advanced degree at the University of British Columbia, I agree that the Library shall make it freely available for reference and study.I further agree that permission for extensive copying of this thesis for scholarly purposes may be granted by the Head of my Department or by his representatives. It is understood that copying or publication of this thesis for financial gain shall not be allowed without my written permission. ABSTRACTThe method of fabrications the theory and the properties of evaporated silicon thin-film transistors are discussed. The device consists of a p-type silicon film (0.5 to 2 ytt-thick) on a sapphire substrate^ with aluminum source-drain electrodes evaporated onto the silicon and followed by a silicon oxide., SiO xS insulating layer and an aluminum gate. The device operates by field-effect conductivity modulation of an n-type inversion layer at the surface of the p-£ype film. The silicon films were evaporated by electron beam heating in a typical vacuum of 7 x 10"^ mm Hg at a rate of 200-600 l/min. The films exhibited single crystal diffraction patterns when deposited at a substrate temperature in the range 1050°C to 1100°C. They were found to be high resistivity ( > 400 SI -cm) p-type and the 2 hole mobility was of the order 20-30 cm /volt-sec. The minority carrier lifetime was 1-2 /isec and the optical absorption edge of the films was found to be broader than the absorption edge of single crystal silicon at all substrate temperatures. The low carrier mobility and minority carrier lifetime as well as the broadening of the optical absorption edge are attributed to the presence of a lar;ge number of crystallographic defects in the films. The effective surface state density at the Si/evaporated SiO interface was estimated by the-MOS technique X and was found to be of the same order of magnitude (3 -11 -2 4 x 10 cm ) as that at the Si/thermally grown Si02 interface. The silicon surface potential in the MOS structure was found to be particularly susceptible to water vapour and contamination by sodium. The silicon thin-film transistors fabricated have typical effective mobilities of 5-10 cm^/volt-sec with transconductances as high as 100 /unho and gain bandwidth products up to 1 MHz. Surface trapping was found to affect the behavior of the devices at low gate voltages. The characterization of the traps by a method which involves measurements of the source-drain conductance, its temperature dependence and its transient response is discussed. The effect of surface scattering on the mobility at high gate voltages is also considered. The device characteristics were stable in vacuum but drifted when exposed to the atmosphere. ABSTRACT The method of fabrication, the theory and the properties of evaporated silicon thin-film transistors are discussed. The device consists of a p-type silicon film (0.5 to 2|i thick) on a sapphire substrate, with aluminum source-drain electrodes evaporated onto the silicon and followed by a silico...

show abstract

“…Conventional SOI MOSFETs are categorized into two major groups as fully depleted and partially depleted that depends on the silicon film thickness and the doping. The first SOI transistor was reported in the year 1964 and these devices were partially depleted devices fabricated on silicon-onsapphire (SOS) substrates [9]. The first fully depleted SOI MOSFET was reported in the year 1980 [16], [39].…”

Section: Introductionmentioning

confidence: 99%

A review on performance comparison of SOI MOSFET with STS-SOI MOSFET

Karthick

Ajayan

Vivek

et al. 2015

2015 2nd International Conference on Electronics and Communication Systems (ICECS)

View full text Add to dashboard Cite

The last few decades have seen considerable progress in development of techniques for growing single crystal silicon film on insulator (SOI) substrates suitable for the fabrication of high performance devices. The SOI substrates promise to extend the range of applications including VLSI, memory, analog and digital integrated circuits and mixed signal applications. In this paper, the performance of SOI technology based SOI MOSFETs and schottky tunneling source SOI MOSFETs is reviewed. The SOI technology along with metallic S/D offers several benefits that enable scaling to sub 22nm gate lengths including extremely low S/D parasitic resistances, superior control of leakage current and elimination of bipolar latch up action. STS-FETs also benefits from the use of high-k dielectrics along with S/D engineering and gate engineering. Keywords -Erbium silicide, metal source/drain (S/D), platinum silicide, Schottky barriers (SBs).I.

show abstract

Grown-film silicon transistors on sapphire

Cited by 61 publications

References 3 publications

The advancement of silicon-on-insulator (SOI) devices and their basic properties

The advancement of silicon-on-insulator (SOI) devices and their basic properties

Evaporated silicon thin-film transistors

A review on performance comparison of SOI MOSFET with STS-SOI MOSFET

Contact Info

Product

Resources

About