FLAWS IN Fig. 10. Schematic representation of a polysilicon deformation process, caused by the stress from an oxide wedge. The process depicted consists of two consecutive stress buildup/slip cycles.Both mechanisms are dependent on the growth rate of the oxide, the rate of volume expansion, and the rate of viscoelastic flow of the oxide. The most unforgiving condition will be for a high poly I doping concentration and a low t e m p e r a t u r e steam oxidation.
ConclusionRAM devices employing double polysilicon structures, with insulating oxides grown at low t e m p e r atures (e.g., 80O~ m a y be degraded by flaws in the sidewall oxides. Two mechanisms are proposed b y which two types of sidewall flaws are generated; both ABSTRACT The dislocation structure of WEB silicon ribbon is investigated using high-voltage transmission electron microscopy and scanning electron microscopy in the beam-induced current mode (EBIC). A high density dislocation network is present near the twin boundary region contained in the web and consists of perfect and partial dislocations. In particular straight dislocations lying in <110> directions can be Lomer-Cottrell locks, but are more frequently perfect glide or partial dislocations. 1 Permanent address: Max Planck I n s t i t u t fiir M e t a l l f o r s c h u n g , I n s t i t u t fiir P h y s l k , 76~0 S t u t t g a r t 80, G e r m a n y .