Guidelines for developing power stage layouts using normally-off SiC JFETs based on parasitic analysis

Stewart, Corris; Escobar-Mejía, Andrés; Balda, Juan Carlos

doi:10.1109/ecce.2013.6646805

Cited by 13 publications

(3 citation statements)

References 16 publications

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“…In a complicated resonance process, the impact of individual inductances (L d , L g , L s ) on the oscillation is different. Analytical (Xiao et al, 2004;Ren et al, 2006;Zhang et al, 2008;Li et al, 2011;Wang et al, 2012;Alexakis et al, 2013;Raee et al, 2013;Takao and Ohashi, 2013;Azizouglu and Karaca, 2014;Nayak and Hatua, 2016;Xie et al, 2016) and empirical methods (Chen, 2009;Chen et al, 2010;Zhang et al, 2012;Chen et al, 2013a;Stewart et al, 2013;Wada et al, 2013;Anthon et al, 2014;Noppakunkajorn et al, 2014;Noppakunkajorn et al, 2015;Walder and Yuan, 2015;Wang X. et al, 2017) have been reported that investigated the impact of different parasitic inductance on oscillation. As shown in Figure 3B, it is concluded that the impact of L g on damped oscillation is negligible and the main contributor is L d (Chen, 2009;Khanna et al, 2013).…”

Section: Damped Oscillations In V Dsmentioning

confidence: 99%

Performance Improvement Strategies for Discrete Wide Bandgap Devices: A Systematic Review

Tahir

2021

Front. Energy Res.

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Wide bandgap (WBG) devices are becoming increasingly popular due to their excellent material properties. WBG devices are commercially available in discrete and module packages. Many studies have investigated the design, structure and benefits of module packages. However, a comprehensive and in-depth overview of the discrete package is lacking. Discrete package has the advantages of flexibility, scalability and reduced cost; however, challenges of severe switching oscillations and limited current capacity are associated with it. This review encompasses the switching oscillations and limited current capacity issues of discrete devices. Switching oscillations are categorized in terms of voltage. The underlying oscillation mechanisms are explored in detail. For the current imbalance, the types, root causes and adverse effects in parallel-connected discrete devices application are reviewed. Besides, the most recent techniques to extract stray parameters are also explored. Finally, state-of-the-art methods to mitigate the switching oscillations and the current imbalance are summarized and evaluated. The performance improvement strategies discussed in this paper can assist researchers to better use the discrete package and can stimulate them to come up with new solutions.

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Section: Damped Oscillations In V Dsmentioning

confidence: 99%

Performance Improvement Strategies for Discrete Wide Bandgap Devices: A Systematic Review

Tahir

2021

Front. Energy Res.

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“…[12,13] These inductances are in the nH range, but they influence the switching transition significantly when the frequency is increased and hence they contribute to majority of the problems in GaN circuits. So the design of the PCB layout becomes very critical in order to minimize these parasitic inductances that distorts the circuit and [17].…”

Section: Theoretical and Simulation Analysismentioning

confidence: 99%

Investigation of Parasitics in Power Circuits Switched With Cascode Gan Hemts

Hari¹

2016

IJRET

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Gallium Nitride (GaN) devices due to its superior material properties over Si has the potential to provide better system level performance when integrated into power electronic applications. These fast switching devices are continuously evolving in the market with 600 V devices getting commercialized and manufacturers coming up with different variants of normally-off devices to completely exploit the wondrous properties of this novel material. The growing acceptability of these devices has seen a strong interest in cascode structures. However, there is a lack of understanding of the issues caused by these nearly ideal devices when used in real circuits. Therefore, this paper is aimed at investigating the influence of parasitic inductances and capacitances that causes unexpected behavior in cascode GaN based half-bridges. This problem is addressed by performing detailed theoretical analysis and Pspice simulations to formulate design rules. These predictions are then experimentally validated by designing and demonstrating 1 kW, 500 KHz GaN half bridge prototypes using different gate drives. The novelty of this paper lies in providing a holistic approach to the instability issues in cascode GaN high electron mobility transistor (HEMT) based half-bridge circuits caused due to parasitics of the device, package and the PCB layout.

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“…Different design guidelines and techniques have been studied. In [18], researchers looked at minimizing voltage spikes across the dc link by using interleaved layout configuration. References [19] and [20] compared the switching loop inductance with respect to the placement of the dc-bus capacitor.…”

Section: Introductionmentioning

confidence: 99%

Analysis of High-Speed PCB With SiC Devices by Investigating Turn-Off Overvoltage and Interconnection Inductance Influence

Noppakunkajorn

Han

Sarlioglu

2015

IEEE Trans. Transp. Electrific.

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Silicon (Si) carbide (SiC)-based power switching devices provide significant performance improvements compared to conventional Si devices. The superior characteristics enable considerable loss, size, and weight reduction of power converters in the powertrain of hybrid/electric vehicles. However, the fast switching capability of SiC devices renders them more vulnerable to parasitic inductances in the circuit. The purpose of this paper is to analyze the impact of interconnection inductances to overvoltage during turn-OFF transient of SiC devices. To understand the switching behavior of the SiC devices, the ringing and overshoots of the voltage caused by the device capacitance and interconnection inductances are considered. Parametric studies are conducted to compare the influences of printed circuit board (PCB) and packaging inductances on the peak turn-OFF overvoltage under various operating conditions. A prototype half-bridge buck converter with SiC MOSFETs is constructed for the experiments. Experimental results are shown to validate the simulation results. Index Terms-Hybrid/electric vehicle, parasitic inductance, silicon (Si) carbide (SiC), voltage overshoot.

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Guidelines for developing power stage layouts using normally-off SiC JFETs based on parasitic analysis

Cited by 13 publications

References 16 publications

Performance Improvement Strategies for Discrete Wide Bandgap Devices: A Systematic Review

Performance Improvement Strategies for Discrete Wide Bandgap Devices: A Systematic Review

Investigation of Parasitics in Power Circuits Switched With Cascode Gan Hemts

Analysis of High-Speed PCB With SiC Devices by Investigating Turn-Off Overvoltage and Interconnection Inductance Influence

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