Hardware-Based Protection for Data Security at Run-Time on Embedded Systems

Wang, Xiang; Zhang, Xiaobing; Wang, Weike; Du, Pei; Zhang, Zhun; Tian, Yuntong; Hao, Qiang; Xu, Bin

doi:10.1088/1757-899x/466/1/012070

Cited by 2 publications

(3 citation statements)

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“…The hash-oriented integrity checking method is well known for its low collision probability, but the computation is quite complicated. Taking into consideration the constraints of embedded processor resources and other factors, the lightweight hash function (LHash) we proposed previously [16] is utilized to calculate the digest. DIG cal is the calculated digest of BB in run-time and obtained by the same method as DIG re f .…”

Section: Sourcementioning

confidence: 99%

“…We could determine the boundary by identifying the jump instruction. With decoding each executing instruction, we adopted a lightweight hash function [16] to calculate the digest value of current BB denoted as DIG cal . Meanwhile, SMU would search the corresponding reference digest (DIG re f ) from M-Cache or memory according to the EA start of current BB.…”

Section: Overall Structurementioning

confidence: 99%

“…In comparison, the hardware-based technologies mainly customize the secure monitoring circuits to scan real-time binary codes of executing instructions, which could be easily integrated into the system on Chip (SoC) during the design of processor [15,16]. Moreover, with the help of hardware, these hardware-dependent methods would detect real-time programs without occupying many processor resources.…”

Section: Introductionmentioning

confidence: 99%

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Two-Stage Checkpoint Based Security Monitoring and Fault Recovery Architecture for Embedded Processor

Wang

Zhao

et al. 2020

Electronics

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Nowadays, the secure program execution of embedded processor has attracted considerable research attention, since more and more code tampering attacks and transient faults are seriously affecting the security of embedded processors. The program monitoring and fault recovery strategies are not only closely related to the security of embedded devices, but also directly affect the performance of the processor. This paper presents a security monitoring and fault recovery architecture for run-time program execution, which takes regular backup copies of the two-stage checkpoint. In this framework, the integrity check technology based on the basic block (BB) is utilized to monitor the program execution in real-time, while the rollback operation is taken once the integrity check is failed. In addition, a Monitoring Cache (M-Cache) is built to buffer the reference data for integrity checking. Moreover, a recovery strategy mainly for three tampered positions (registers in processor, instructions in Cache, and codes in memory) is provided to ensure the smooth running of the embedded system. Finally, the open RISC processor is adopted to implement and verify the presented security architecture, which has been proved to be effective for program detection in the execution of tamper attack and quick recovery of the running environment as well as code.

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Section: Sourcementioning

confidence: 99%

Section: Overall Structurementioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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