The usage of physically unclonable functions is for authentications, identification applications, signature generation, I.C. metering, and cryptographic key generation. Moreover, the utilization of smart devices is also growing, which is associated with security threats and alerts. The critical feature of PUF is reliance on random variations in the fabricated hardware to derive a known random key. These acquire error-correcting methods to generate PUFs responses across different temperatures. Recently, many PUF designs concentrate on exploiting design variations intrinsic to CMOS technology. Furthermore, PUFs are emerging with nanotechnology, which is not fully developed, but they are expected to develop further. This paper discusses a two-level finite-state machine that is proposed to correct erroneous bits created by temperature variations. In contrast, every response of PUF is mapped to a key during the initial stage of design, but the actual resolution is determined after the completion of chip fabrication; this is because the key is not known to the foundry; this approach prevents counterfeiting. In addition, to change keys, the challenges of the PUF have to change. Thus, access can be modified further, which gives more flexibility in securing utilized chips. We used a cadence tool to execute this proposed design, which produces software, hardware and silicon structures for I.C. designing systems on chips and printing circuit boards.