Hardware-Based Task Dependency Resolution for the StarSs Programming Model

Abstract

T am e r D a l l o u , B e n J u u r l i n k H a r dw a r e -b a s e d t a s k d e p e n d e n c y r e s o l u t i o n f o r t h e S t a r S s p r o g r amm i n g m o d e l C on f e r en c e ob j e c t , P o s tp r in t v e r s i on T h i s v e r s i o n i s a v a i l a b l e a t h t t p : / / d x . d o i . o r g / 1 0 . 1 4 2 7 9 / d e p o s i t o n c e -5 7 8 1 .Sugg e s t ed C i t a t i on D a l l o u , T am e r ; J u u r l i n k , B e n : H a r dw a r e -b a s e d t a s k d e p e n d e n c y r e s o l u t i o n f o r t h e S t a r S s p r o g r amm i n g m o d e l . -I n : 2 0 1 2 4 1 s t I n t e r n a t i o n a l C o n f e r e n c e o n P a r a l l e l P r o c e s s i n g W o r k s h o p s : I C P PW . -N ew Y o r k , N Y [ u . a . ] : I E E E , 2 0 1 2 . -I S BN : 9 7 8 -1 -4 6 7 3 -2 5 0 9 -7 . -p p . 3 6 7 -3 7 4 . -DO I : 1 0 . 1 1 0 9 / I C P PW . 2 0 1 2 . 5 3 . ( P o s t p r i n t v e r s i o n i s c i t e d , p a g e n um b e r s d i f f e r . ) T e rm s o f U s e © © 2 0 1 2 I E E E . P e r s o n a l u s e o f t h i s m a t e r i a l i s p e rm i t t e d . P e rm i s s i o n f r om I E E E m u s t b e o b t a i n e d f o r a l l o t h e r u s e s , i n a n y c u r r e n t o r f u t u r e m e d i a , i n c l u d i n g r e p r i n t i n g / r e p u b l i s h i n g t h i s m a t e r i a l f o r a d v e r t i s i n g o r p r om o t i o n a l p u r p o s e s , c r e a t i n g n ew c o l l e c t i v e w o r k s , f o r r e s a l e o r r e d i s t r i b u t i o n t o s e r v e r s o r l i s t s , o r r e u s e o f a n y c o p y r i g h t e d c om p o n e n t o f t h i s w o r k i n o t h e r w o r k s .

An Integrated Hardware-Software Approach to Task Graph Management

“…In [9], it was shown that in order to reduce lookup time when a hash collision occurs, the hash table is replicated in a setassociative structure. This way, an input/output lookup requires only one visit to the Dependence Table, rather than multiples of that when implementing a linked-list structure inside a larger hash table, as was the case in [8].…”

“…The list of configurable parameters and their experimental values are shown in Table I. The sizes of the different tables and lists in the Task Maestro were empirically determined, enlightened by previous work ( [8], Fig. 3.…”

“…Nexus++ is based on the basic table lockups of Nexus to manage the task graph, but in an overhauled and more efficient design [8], presented as a SystemC prototype. Nexus++ removes the limitations on the number of inputs and outputs a task can have (up to 5 in [7], [11]).…”

“…Previous work ( [7], [8], [9]) introduced hardware support for task graph management, and showed significant improvement in the scalability of different micro benchmarks modeled after H.264 video decoding. In [9], it was proposed to integrate a hardware accelerator, called Nexus++, with the OmpSs runtime system by using a PCIe extension board housing an FPGA.…”

“…In [9], it was proposed to integrate a hardware accelerator, called Nexus++, with the OmpSs runtime system by using a PCIe extension board housing an FPGA. However, as the necessary support from the OmpSs runtime was not provided, Nexus++ was evaluated, similarly to its predecessors in [7], [8], using only synthetic benchmarks.…”