2023
DOI: 10.1007/s13369-023-07655-6
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Hardware Design of FPGA-Based Embedded Heuristic Optimization Technique for Solving a Robotic Problem: IC-PSO

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Cited by 2 publications
(1 citation statement)
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“…For instance, a backstepping control regulator has been implemented for PUMA 560 using the FPGA-in-the-loop option on the Xilinx Zedboard Zynq FPGA with the Hardware Description Language (HDL) Coder tool [16]. Another study focused on optimizing solution times for real-time use of inverse kinematics in articulated robots, developing and testing an optimization algorithm compatible with FPGA architecture [17]. Furthermore, a discussion on the application of FPGAbased HIL simulation to computer vision in an unmanned aerial vehicle is presented in [18].…”
Section: Introductionmentioning
confidence: 99%
“…For instance, a backstepping control regulator has been implemented for PUMA 560 using the FPGA-in-the-loop option on the Xilinx Zedboard Zynq FPGA with the Hardware Description Language (HDL) Coder tool [16]. Another study focused on optimizing solution times for real-time use of inverse kinematics in articulated robots, developing and testing an optimization algorithm compatible with FPGA architecture [17]. Furthermore, a discussion on the application of FPGAbased HIL simulation to computer vision in an unmanned aerial vehicle is presented in [18].…”
Section: Introductionmentioning
confidence: 99%