Hardware Implementation of A Non-RLL Soft-decoding Beacon-based Visible Light Communication Receiver

Abstract

Visible light communication (VLC)-based beacon systems, which usually transmit identification (ID) information in small-size data frames are applied widely in indoor localization applications. There is one fact that flicker of LED light should be avoid in any VLC systems. Current flicker mitigation solutions based on run-length limited (RLL) codes suffer from reduced code rates, or are limited to hard-decoding forward error correction (FEC) decoders. Recently, soft-decoding techniques of RLL-codes are proposed to support soft-decoding FEC algorithms, but they contain potentials of high-complexity and timeconsuming computations. Fortunately, non-RLL direct current (DC)-balance solutions can overcome the drawbacks of RLLbased algorithms, however, they meet some difficulties in system latency or inferior error-correction performances. Recently, non-RLL flicker mitigation solution based on Polar code has proved to be an optimal approach due to its natural equal probabilities of short runs of 1's and 0's with high error-correction performance. However, we found that this solution can only maintain the DC balance only when the data frame length is sufficiently long. Accordingly, short beacon-based data frames might still be a big challenge for flicker mitigation in such non-RLL cases. In this paper, we introduce a flicker mitigation solution designed for VLC-based beacon systems that combines a simple pre-scrambler with a Polar encoder which has a codeword smaller than the previous work 8 times. We also propose a hardware architecture for the proposed compact non-RLL VLC receiver for the first time. Also, a 3-bit soft-decision filter is introduce to enable softdecoding of Polar decoder to improve the performance of the receiver.

Hardware Architectures of Visible Light Communication Transmitter and Receiver for Beacon-based Indoor Positioning Systems

“…Specifically, a (256;158) polar code, which has a code rate of 0.617, is suitable for a beacon-based frame size of K=158. 3) High error-correction performance can be achieved with a low hardware complexity [28]. 4) The inherently short run lengths of a polar encoder can be useful in mitigating the lighting flicker [9].…”

“…Secondly, the last stage's PE is modified to output two decoded information bits every each clock cycle. These two modified points have been presented in our previous work [28]. Thirdly, we have implemented a partial sums generator (PSG) based on Polar encoders with various codelength sizes, and integrate the PSG into the scheduling control block of the SC Polar decoder.…”