2021
DOI: 10.3390/electronics10202546
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Hardware Implementation Study of Particle Tracking Algorithm on FPGAs

Abstract: In recent years, the technological node used to implement FPGA devices has led to very high performance in terms of computational capacity and in some applications these can be much more efficient than CPUs or other programmable devices. The clock managers and the enormous versatility of communication technology through digital transceivers place FPGAs in a prime position for many applications. For example, from real-time medical image analysis to high energy physics particle trajectory recognition, where comp… Show more

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Cited by 4 publications
(7 citation statements)
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“…Recently, the HT algorithm has been studied and implemented on many electronic cards [8][9][10][11]. In particular, in this study we show the algorithm investigated for tracking detectors in HEPE, where it is used to extract trajectories and straight or curved lines, within digital image representations of the particle space.…”
Section: Pattern Recognition In Hepe Using the Hough Transformmentioning
confidence: 99%
See 2 more Smart Citations
“…Recently, the HT algorithm has been studied and implemented on many electronic cards [8][9][10][11]. In particular, in this study we show the algorithm investigated for tracking detectors in HEPE, where it is used to extract trajectories and straight or curved lines, within digital image representations of the particle space.…”
Section: Pattern Recognition In Hepe Using the Hough Transformmentioning
confidence: 99%
“…Formula (1) executes the conversion from the particle space to the HS using (r) as the radius of the detector layer in the real transversal plane, (ϕ) as the angle of the Hit with respect to the horizontal axis; let us say that these are the input parameters. On the contrary, (φ 0 ) is the same angle of the particle trajectory with respect the origin, and let us call it an output parameter of Formula (1), along with the ( Aq Pt ), which is described below (see [8,9] for details). Formula (1) computes, for each pair of Hits, many operations by varying (φ 0 ) angles and, consequently, any Hit in the parameter space creates many straight-lines in the HS.…”
Section: Aqmentioning
confidence: 99%
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“…We have shown the possibility of implementing the Hough transform (HT) in pattern recognition problems within "high-energy" physics experiments where "less-performing" solutions would have been abandoned. In [9], we report in detail an HW implementation (with the block diagram), while, in this paper, we broaden the field to more generic low-latency applications by using the design of an SW development tool. In [9], Xilinx UltraScale+ FPGA is investigated.…”
Section: Introductionmentioning
confidence: 99%
“…In [9], we report in detail an HW implementation (with the block diagram), while, in this paper, we broaden the field to more generic low-latency applications by using the design of an SW development tool. In [9], Xilinx UltraScale+ FPGA is investigated. The device features many gates, high-bandwidth memories, transceivers, and other high-performance electronics in a single chip, enabling the design of large, complex, and scalable architectures.…”
Section: Introductionmentioning
confidence: 99%