Hardware/software co-verification (panel)

Abstract

Over the recent past, the focus of EDA tools has been on tackling the chip issues. Today, system design issues are emerging as the top concerns of design teams. The issues include the inability to simulate at the system level, incomplete and inaccurate system specs, and immature hardware/software co-design. Co-design is an essential element of new design methodologies for system development:• ratios of seven software engineers per hardware engineer are now common in the development of complex embedded systems; • errors cost 10 times more to correct at the integration stage than during design; • system specifications change impacting both hardware and software development; • interfaces between hardware and software are non-trivial for system design. A comprehensive hardware/software co-design methodology needs to deliver a unified implementation environment addressing the issues outlined above. What kind of tools can meet this challenge? Are EDA vendors close to providing the tools that the designers need? Brian Bailey, Mentor Graphics, Wilsonville, OROver the past few years a number of commercial products have been introduced that address various parts of the system verification problem. The recent introductions have focused on the hardware/software boundary. These tools are a start, but the field is very much in its infancy. Today's tools are limited to a single abstraction of software and in most cases a single hardware simulation session. This makes the tools useful as an implementation verification solution and enables the notion of a virtual hardware prototype upon which we can perform software verification. It does not make them useful for higher level design or concept validation. This requires tools that are much more flexible and can cross many abstraction domains. At the same time, these hardware/software simulators must join with other parts of the system verification problem to create a complete verification solution. As with all simulation solutions, models are a key issue, both in terms of availability and accuracy. It appears as if many core providers are stepping up to the challenge of providing these simulation models for processors or are willing to assist in the validation of models. This will be a key step in the wide-spread acceptance of these tools. Kurt Keutzer, Synopsys, Mountain View, CAThere is no single hardware-software co-simulation problem and as a result there is no single tool or technology that can successfully solve all the problems associated with co-verification of hardware and software. Each developer must trade off the desired performance against the level of accuracy. Accuracy itself has two aspects. The first is the timing accuracy. The second might be called veracity, or the extent to which the model accurately models the design under verification. Once these parameters are fixed then the remaining challenge is to determine which solution comes closest to meeting the requirements at a cost, in time and money, that one is willing to pay. For hardware designers the trade-off...