Proceedings of the 1992 International Conference on Industrial Electronics, Control, Instrumentation, and Automation
DOI: 10.1109/iecon.1992.254398
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Hardware structures and digital signal processor for image processing on real time

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Cited by 2 publications
(3 citation statements)
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“…The implementation of filter is realized through the convolution process between the input signal and the impulse response. To generate a FIR filter, the coefficients of time domain filter must be limited in number by multiplying by a window function of a finite width [5]. The basic idea of applying windows through the design of filters is to truncate the sequence of the filter to be limited to certain values.…”
Section: Introductionmentioning
confidence: 99%
“…The implementation of filter is realized through the convolution process between the input signal and the impulse response. To generate a FIR filter, the coefficients of time domain filter must be limited in number by multiplying by a window function of a finite width [5]. The basic idea of applying windows through the design of filters is to truncate the sequence of the filter to be limited to certain values.…”
Section: Introductionmentioning
confidence: 99%
“…The hardware architecture of image processing system based on time sharing to synchronize the processing time [33,34]. The convolution processor is a linear operation using low pass and high pass filters to implement 2D-DWT [35,36].…”
Section: Introductionmentioning
confidence: 99%
“…One of them is the direct execution of the two dimensional discrete wavelet transform cascade of two processes of on dimensional discrete wavelet transform. Another approach is implementing two dimensional discrete wavelet transform with optimized control and architecture [33].…”
Section: Introductionmentioning
confidence: 99%