Hardware Trojan Classification at Gate-level Netlists based on Area and Power Machine Learning Analysis

Λιάκος, Κωνσταντίνος; Γεωργακίλας, Γεώργιος; Plessas, Fotis

doi:10.1109/isvlsi51109.2021.00081

Cited by 10 publications

(10 citation statements)

References 12 publications

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“…Next, we explored our real training data set and found that TI circuits have a larger area and consume more power compared with TF circuits (10). From the exploration of our real data set, it became evident that the Trust-HUB initial real data set is highly imbalanced.…”

Section: Scheme Of Gainesis Methodologymentioning

confidence: 99%

“…Wasserstein Generator Loss = D(G(z)) (10) From our four generative learning models, our WCGAN-based model was found to be the best-performing model in epoch 47,000 of 50,000 epochs, with a generator loss value equal to 0.102 (Figure 7) and discriminator loss value equal to 0.0984 (Figure 8). The next best-performing model was our WGAN-based model for epoch 47,000 from 50,000 epochs, with a generator loss value equal to 0.0995 (Figure 7) and discriminator loss value equal to 0.114 (Figure 8), while our CGAN-based model's best epoch was 48,000 from 50,000 epochs, with a generator loss value equal to 0.369 (Figure 7) and discriminator loss value equal to 0.263 (Figure 8).…”

Section: Gainesis Evaluationmentioning

confidence: 95%

“…To be able to develop our ML-based classifier for our REAL-880 data set we trained and optimized seven ML-based classification models. We based this method on our previous work [10] where we developed six ML-based classifiers for the classification of TF and TI circuits via area and power analysis features in the GLN phase, with the difference that in this study we used an extra ML algorithm, the XGB. It must be mentioned that for the training and optimization of each classifier we used a combination of the appropriate hyperparameters based on each ML-based algorithm, which consisted of a wide range of values.…”

Section: Machine Learning Classifiers Developmentmentioning

confidence: 99%

“…The discriminator aims to increase the output for real instances rather than fake instances. For this reason, we use the Wasserstein Discriminator Loss (9) and Generator Loss (10). Specifically, D(x) is the output for a real instance at the discriminator.…”

Section: Gainesis Evaluationmentioning

confidence: 99%

“…For the pre-silicon stage, these studies aim for the classification of normal and HT-infected circuits at the GLN phase, using area and power analysis GLN features such as number of gates, number of nets, number of multiplexers, number of flip-flops, number of cells and number of ports, as well as total, switching and combinational power. The most frequently used ML algorithms are support vector machine (SVM) and random forest (RF), with SVM typically ranking as the best-performing model [7][8][9][10].…”

Section: Introductionmentioning

confidence: 99%

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GAINESIS: Generative Artificial Intelligence NEtlists SynthesIS

et al. 2022

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A significant problem in the field of hardware security consists of hardware trojan (HT) viruses. The insertion of HTs into a circuit can be applied for each phase of the circuit chain of production. HTs degrade the infected circuit, destroy it or leak encrypted data. Nowadays, efforts are being made to address HTs through machine learning (ML) techniques, mainly for the gate-level netlist (GLN) phase, but there are some restrictions. Specifically, the number and variety of normal and infected circuits that exist through the free public libraries, such as Trust-HUB, are based on the few samples of benchmarks that have been created from circuits large in size. Thus, it is difficult, based on these data, to develop robust ML-based models against HTs. In this paper, we propose a new deep learning (DL) tool named Generative Artificial Intelligence Netlists SynthesIS (GAINESIS). GAINESIS is based on the Wasserstein Conditional Generative Adversarial Network (WCGAN) algorithm and area–power analysis features from the GLN phase and synthesizes new normal and infected circuit samples for this phase. Based on our GAINESIS tool, we synthesized new data sets, different in size, and developed and compared seven ML classifiers. The results demonstrate that our new generated data sets significantly enhance the performance of ML classifiers compared with the initial data set of Trust-HUB.

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Section: Scheme Of Gainesis Methodologymentioning

confidence: 99%

Section: Gainesis Evaluationmentioning

confidence: 95%

Section: Machine Learning Classifiers Developmentmentioning

confidence: 99%

Section: Gainesis Evaluationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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GAINESIS: Generative Artificial Intelligence NEtlists SynthesIS

et al. 2022

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Hardware and System Security: Attacks and Countermeasures Against Hardware Trojans

Λιάκος¹,

Γεωργακίλας²,

Plessas³

2023

Frontiers of Quality Electronic Design (QED)

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A Survey on Hardware Vulnerability Analysis Using Machine Learning

Pan

Mishra

2022

IEEE Access

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Electronic systems rely on efficient hardware, popularly known as system-on-chip (SoC), to support its core functionalities. A typical SoC consists of diverse components gathered from third-party vendors to reduce SoC design cost and meet time-to-market constraints. Unfortunately, the participation of third-party companies in global supply chain introduces potential security vulnerabilities. There is a critical need to efficiently detect and mitigate hardware vulnerabilities. Machine learning has been successfully used in hardware security verification as well as development of effective countermeasures. There are recent surveys on hardware Trojan detection using machine learning. To the best of our knowledge, there are no comprehensive surveys on utilization of machine learning techniques for detection and mitigation of a wide variety of hardware vulnerabilities including malicious implants (e.g., hardware Trojans), sidechannel leakage, reverse engineering, and supply-chain vulnerabilities (e.g., counterfeiting, overbuilding and recycling). In this paper, we provide a comprehensive survey of hardware vulnerability analysis using machine learning techniques. Specifically, we discuss how existing approaches effectively utilize machine learning algorithms for hardware security verification using simulation-based validation, formal verification as well as side-channel analysis.

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Hardware Trojan Classification at Gate-level Netlists based on Area and Power Machine Learning Analysis

Cited by 10 publications

References 12 publications

GAINESIS: Generative Artificial Intelligence NEtlists SynthesIS

GAINESIS: Generative Artificial Intelligence NEtlists SynthesIS

Hardware and System Security: Attacks and Countermeasures Against Hardware Trojans

A Survey on Hardware Vulnerability Analysis Using Machine Learning

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