Harmonic cancelation strategies for on-chip sinusoidal signal generation using digital resources

Malloug, Hani; Barragán, Manuel J.; Mir, Salvador; Gall, Herve Le

doi:10.1109/ims3tw.2017.7995201

Cited by 3 publications

(2 citation statements)

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“…Fixing amplitudes and determining analytically the phase shifts as described in [9] offers a reasonable division of the main period. This allows a suitable implementation of the clock generation.…”

Section: Discussionmentioning

confidence: 99%

“…Indeed, the number of devices needed would rather be proportional to the sum of the denominator and the numerator. It is thus up to the designer to consider a solution with less square signals to sum but lots of devices as suggested in this paper or a solution with more signals to sum but a less complex design on each of these and a faster clock generation as suggested in [9].…”

Section: Methodsmentioning

confidence: 99%

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On-chip Generation of Sine-wave Summing Digital Signals: an Analytic Study Considering Implementation Constraints

et al. 2018

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Abstract-In the context of biosensor as much as Built-In-Self Test (BIST), on-chip sine-wave signal generation is a recurring research topic. Considering the implementation constraints, it implies a trade-off between the amount of resources and the signal quality. An attractive solution consists in combining several digital signals to build this analog sine-wave. The objective of this paper is to give an analytic study of various potential digitalbased solutions. Thanks to this study, we prove that the technique consisting in setting the phase shifts and various amplitude values of the square-wave signals is the most efficient approach. This study allows the selection of the optimal square-wave signal parameters to cancel low-order harmonics of the generated signal. We proposed a solution for specification-oriented definition of the architecture.

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Section: Discussionmentioning

confidence: 99%

Section: Methodsmentioning

confidence: 99%