HD number plate localization and character segmentation on the Zynq heterogeneous SoC

Abstract

Automatic Number Plate Recognition (ANPR) systems have become widely used in safety, security, and commercial aspects. A typical ANPR system consists of three main stages: Number Plate Localization (NPL), Character Segmentation (CS), and Optical Character Recognition (OCR). In recent years, to provide a better recognition rate, High Definition (HD) cameras have started to be used. However, most known techniques for Standard Definition (SD) are not suitable for real-time HD image processing due to the computationally intensive cost of processing several-folds more of image pixels, particularly in the NPL stage. In this paper, algorithms suitable for hardware implementation for NPL and CS stages of an HD ANPR system are presented. Software implementation of the algorithms was carried on as a proof of concept, followed by hardware implementation on a heterogeneous System on Chip (SoC) device that contains an ARM processor and a Field Programmable Gate Array (FPGA). Heterogeneous implementation of these stages has shown that this HD NPL algorithm can localize a number plate in 16.17 ms, with a success rate of 98.0%. The CS algorithm can then segment the detected plate in 0.59 ms, with a success rate of 99.05%. Both stages utilize only 21% of the available on-chip configurable logic blocks.

Optical character recognition on heterogeneous SoC for HD automatic number plate recognition system

“…The two stages utilize around 12% of the available resources in the selected platform. More details about the proposed HD NLP and CS stages by the authors can be found in [18,19].…”

Automatic license plate recognition on microprocessors and custom computing platforms: A review

“…The duality of morphological operations could be exploited by implementing a single architecture as hardware to perform dual functions using appropriate control logic for resource control. The work of [73] adopted [67] top-hat technique for plate feature extraction. Unlike [67], it carefully chose processing stages that consume more processing time to accelerate them on FPGA.…”

“…Morphological open and image subtraction is used in place of spatial filters for edge detection [70–74]. Structuring elements used for morphological operations are designed based on the size of license plate and shape of characters.…”

“…The work of [73] adopted [67] top‐hat technique for plate feature extraction. Unlike [67], it carefully chose processing stages that consume more processing time to accelerate them on FPGA.…”

An overview of Various Techniques for Automatic License Plate Localization

“…This method achieves a very high accuracy for detecting LP from one vehicle image with detection, precision and F-measure rates are 98.56%, 95.9%, and 97.19%, respectively. Ali Al-Zawqari et al [16], proposed an HD localization method for number plates. Firstly, the HD image resizes to SD image and then the features are extracted using morphological operations which then passed to CCA algorithm that identified white components using 4-connectivity.…”