2001
DOI: 10.1109/23.983149
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Heavy-ion-induced breakdown in ultra-thin gate oxides and high-k dielectrics

Abstract: We present experimental results on single-event-induced breakdown in sub-5-nm plasma-enhanced SiO 2 , nitrided SiO 2 , Al 2 O 3 , HfO 2 , and Zr 0 4 Si 1 6 O 4 dielectrics typical of current and future-generation commercial gate oxides. These advanced oxides are found to be quite resistant to ion-induced breakdown. Radiation-induced soft breakdown was observed in some films with 342 MeV Au (LET = 80 MeV/mg/cm 2) but not 340 MeV I (LET = 60 MeV/mg/cm 2). The critical voltage to hard breakdown was found to scale… Show more

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Cited by 75 publications
(27 citation statements)
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“…Although the results reported here show that the voltage required for HBD/SEGR is reduced as LET and fluence are increased (confirming earlier reports in thicker oxides [6]- [8]), the field required for the onset of SEGR is outside the range of normal device operation (see also [16]). Future scaling, however, may bring operating voltages into this regime.…”
Section: Discussionsupporting
confidence: 90%
See 1 more Smart Citation
“…Although the results reported here show that the voltage required for HBD/SEGR is reduced as LET and fluence are increased (confirming earlier reports in thicker oxides [6]- [8]), the field required for the onset of SEGR is outside the range of normal device operation (see also [16]). Future scaling, however, may bring operating voltages into this regime.…”
Section: Discussionsupporting
confidence: 90%
“…There is controversy in the literature [1], [6]- [9], [16] as to whether heavy-ion irradiation will be a threat to gate oxides in scaled devices. Although the results reported here show that the voltage required for HBD/SEGR is reduced as LET and fluence are increased (confirming earlier reports in thicker oxides [6]- [8]), the field required for the onset of SEGR is outside the range of normal device operation (see also [16]).…”
Section: Discussionmentioning
confidence: 99%
“…If a large electric field is applied across the insulator and a heavy ion passes through it, a catastrophic failure known as single event gate rupture (SEGR) can occur [85]. This is a common failure mode for high-voltage MOS transistors in space, but is becoming increasing relevant as CMOS technology scales to smaller features and thinner oxides [86,87].…”
Section: Permanent Damage Effectsmentioning
confidence: 99%
“…For metal oxide semiconductors and complementary metal oxide semiconductors (CMOS), the insulating SiO 2 thin layer is used as the gate dielectric, which CONTACT Q. Yang qyang@xtu.edu.cn is vital for surface electrical field control and device isolation. The radiation of high-energy ions can induce charge lose and electrical properties degradation in CMOS by charge injection into the gate dielectric (9)(10)(11)(12). For example, the SHI can produce micro-damage (harderror), which may lead to the data losing in dynamic random access memory (13).…”
Section: Introductionmentioning
confidence: 99%