Heax

Abstract

With the rapid increase in cloud computing, concerns surrounding data privacy, security, and confidentiality also have been increased significantly. Not only cloud providers are susceptible to internal and external hacks, but also in some scenarios, data owners cannot outsource the computation due to privacy laws such as GDPR, HIPAA, or CCPA. Fully Homomorphic Encryption (FHE) is a groundbreaking invention in cryptography that, unlike traditional cryptosystems, enables computation on encrypted data without ever decrypting it. However, the most critical obstacle in deploying FHE at large-scale is the enormous computation overhead. In this paper, we present HEAX, a novel hardware architecture for FHE that achieves unprecedented performance improvements. HEAX leverages multiple levels of parallelism, ranging from ciphertext-level to fine-grained modular arithmetic level. Our first contribution is a new highlyparallelizable architecture for number-theoretic transform (NTT) which can be of independent interest as NTT is frequently used in many lattice-based cryptography systems. Building on top of NTT engine, we design a novel architecture for computation on homomorphically encrypted data. Our implementation on reconfigurable hardware demonstrates 164-268× performance improvement for a wide range of FHE parameters.

Area-Efficient Number Theoretic Transform Architecture for Homomorphic Encryption

“…Prior arts can be classified into two major architectural approaches: (i) in-place NTT architectures that use a single computing module to perform computations iteratively and generate the results after a delay gap [14], [15], [16], [17], [18], [19], [20], [21], [22], [23]; and (ii) fully-pipelined NTT architectures that deploy all stages in series and produce coefficients every clock cycle (CC) [24], [25], [26], [27], [28], [29]. The selection of a design method depends on the parameter setting of the HE schemes, desired throughput rate, and available hardware resources on the target computing platform.…”

“…The authors deployed the dual-core NTT for each residue polynomial arithmetic unit supporting multiplication, subtraction, and addition on residual polynomials. Riazi et al subsequently proposed HEAX, an FPGA-based architecture for CKKS-based homomorphic multiplications [19]. HEAX deployed up to 32 BUs (called NTT cores) in parallel, stores all pre-computed TFs in onchip memory, and supports small polynomial sets of maximal seven multiplication depths.…”

RISE: RISC-V SoC for En/decryption Acceleration on the Edge for Homomorphic Encryption

“…Over the years, there have been several works that have focused on accelerating HE computing on the cloud side. These works include algorithmic optimizations for CPU [4], [5] and GPU [6], [7], and custom hardware accelerators [8]- [12] running in the cloud. All these works assume that the cloud receives encrypted data from the edge device and that the cloud sends the encrypted result back to the edge device for decryption.…”

“…This noise within the ciphertext increases with each succeeding homomorphic operation until it reaches a critical level at which it is impossible to recover the computation output [2]. To increase the noise budget for practical HE applications with a large number of HE computations, we need large scheme parameters (N > 2 12 and log Q > 109).…”

Porcupine: a synthesizing compiler for vectorized homomorphic encryption

“…Despite its appeal, two key challenges prevent widespread HE adoption: performance and programmability. Today, most systems-oriented HE research has focused on overcoming the prohibitive performance overheads with high-performance software libraries [36,44] and custom hardware [40,42]. The performance results are encouraging with some suggesting that HE can approach realtime latency for certain applications with sufficiently large hardware resources [40].…”