Hermetic wafer level packaging of MEMS components using through silicon via and wafer to wafer bonding technologies

Abstract

This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with copper filled TSVs and bonded cap wafers for hermetic sealing of resonator components. All processes were performed at 200 mm wafer level. For interposer fabrication a standard process flow including silicon blind hole etching, isolation, copper filling, wafer front side redistribution, support wafer bonding, wafer thinning, and TSV backside reveal was applied. As interposer backside metallization, appropriate I/O terminals and seal ring structures were deposited by semi-additive Au and Au+Sn electro plating. Following, getter material was deposited onto the interposer wafers which were 90 m thick and still mounted onto carrier wafers. Subsequently, the I/O terminal pads of the interposer were stud bumped and finally more than 5000 quartz resonator components were assembled onto each interposer wafer by Au-Au direct metal bonding. The cap wafer was equipped with 200 m deep dry etched cavities and electro plated Au seal rings around them. Finally, both cap and interposer wafers were bonded together using a wafer to wafer bonder and an adapted AuSn soldering process scheme. In a last step, the carrier wafer was removed from the former front side of the interposer wafer and wafer level testing was performed. From a total of 4824 tested devices we found that more than 75 % were sealed properly under vacuum. The getter appears to be effective leading to about 0.1 mbar equivalent air pressure and cavities without getter appear to reach residual air pressure between 1-2 mbar. The used fabrication processes and final results will be discussed detailed in this manuscript

A miniature timing microsystem using two silicon resonators

“…Resulting chipscale packaged components are then amenable for direct soldering on board using flip-chip bonding. Early validation of the combination of the sealing and TSV technologies applied to the packaging of miniature XTALs in a mostly similar way has been demonstrated in [4].…”

3-D Integration and Through-Silicon Vias in MEMS and Microsensors

“…Fig. 22 shows a vacuum packaging structure: a silicon interposer with Cu-filled TSVs is the substrate, and a DRIE etched cavity is the cap wafer [224]. The packaged resonators are bonded to the interposer using Au thermocompression bonding, and the cap wafer and interposer are bonded using Au-Sn eutectic bonding, forming hermetically-sealed vacuum cavities.…”

Application of TSV integration and wafer bonding technologies for hermetic wafer level packaging of MEMS components for miniaturized timing devices

“…The work represents a repetition of the work presented in [6] but with smaller quartz crystal. According to the process flow shown in Figure 2 100 µm thick interposer wafers with TSVs and Au / Au+Sn backside metallization were processed.…”