Hetero-Gate-Dielectric Tunneling Field-Effect Transistors

Device and Circuit Level Performance Comparison of Tunnel FET Architectures and Impact of Heterogeneous Gate Dielectric

“…In order to overcome this impediment, the Hetero Gate (HG) dielectric TFET was proposed by Choi et. al [11], which is capable of suppressing the ambipolar device characteristics due to the presence of a low-k gate dielectric material at the drain end. There are several other methods reported to suppress this ambipolar behavior such as: asymmetric source/drain doping [12], gate drain underlap or short gate TFET [13,14] and hetero-junction TFET [15] being the most extensively studied.…”

“…The fabrication process steps for a p-n-p-n architecture are reported in literature, wherein a tilt angled implant is used to form heavily doped pocket after gate definition [9]. The Hetero-gate TFET can be achieved by isotropic etching of low-k material and then deposition of high-k gate oxide as reported in [11]. In view of the various fabrication methods, reported for p-np-n and Hetero gate dielectric TFET structures, it seems feasible to realize the proposed Hetero-Gate (HG) p-n-pn TFET with the fabrication techniques discussed above.…”

Linearity of Hetero-Gate-Dielectric Tunneling Field-Effect Transistors

“…Thus, a tunneling FET (TFET) has been considered as one of the most promising low-power devices [3]. The earlier TFET studies focused on on-current boosting by introducing various materials and device structures [4][5][6][7].…”

“…Previously, we proposed hetero-gate-dielectric (HG) TFETs [4] and their RF performance and circuit applicability was discussed [8,9].…”

Ambipolarity Factor of Tunneling Field-Effect Transistors (TFETs)

“…One of the most promising devices is a tunneling field-effect transistor (TFET) [1][2][3][4][5][6][7][8][9][10]. TFETs are expected to achieve low power consumption because they have a subthreshold swing less than 60 mV/dec at room temperature and lower off-current than MOSFETs.…”