Hierarchical Diagonal Blocking and Precision Reduction Applied to Combinatorial Multigrid

Blelloch, Guy E.; Koutis, Ioannis; Tangwongsan, Kanat

doi:10.1109/sc.2010.29

Cited by 26 publications

(6 citation statements)

References 35 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Indeed, Koutis et al have an algorithm and implementation based on related techniques that they refer to as "combinatorial multigrid" [BKMT10].Even if one does not demand provable running time bounds, we are not aware of any algorithm whose running time empirically scales nearly linearly on large classes of input graphs that does not roughly follow this general structure.…”

Section: Previous Nearly Linear Time Algorithmsmentioning

confidence: 99%

A simple, combinatorial algorithm for solving SDD systems in nearly-linear time

Kelner

Orecchia

Sidford

et al. 2013

Proceedings of the Forty-Fifth Annual ACM Symposium on Theory of Computing

185

225

View full text Add to dashboard Cite

In this paper, we present a simple combinatorial algorithm that solves symmetric diagonally dominant (SDD) linear systems in nearly-linear time. It uses very little of the machinery that previously appeared to be necessary for a such an algorithm. It does not require recursive preconditioning, spectral sparsification, or even the Chebyshev Method or Conjugate Gradient. After constructing a "nice" spanning tree of a graph associated with the linear system, the entire algorithm consists of the repeated application of a simple (non-recursive) update rule, which it implements using a lightweight data structure. The algorithm is numerically stable and can be implemented without the increased bit-precision required by previous solvers. As such, the algorithm has the fastest known running time under the standard unit-cost RAM model. We hope that the simplicity of the algorithm and the insights yielded by its analysis will be useful in both theory and practice.

show abstract

Section: Previous Nearly Linear Time Algorithmsmentioning

confidence: 99%

A simple, combinatorial algorithm for solving SDD systems in nearly-linear time

Kelner

Orecchia

Sidford

et al. 2013

Proceedings of the Forty-Fifth Annual ACM Symposium on Theory of Computing

185

225

View full text Add to dashboard Cite

show abstract

“…Recursive matrix layouts, similar to our QTS format, have inspired recent papers [4,17]. In their recursive sparse blocks (RSB) format [17], Martone et al, use a quad-tree with ZMorton ordering to store pointers to sparse submatrices that are sized to balance the work partitions.…”

Section: Non-symmetric Spmvmentioning

confidence: 99%

“…Tangwongsan et al [4], introduce a hierarchical storage format that points to the same memory region for off diagonal blocks if the matrix is symmetric (similar to our QTS format). These authors also point out that this kind of matrix storage enables lock and synchronization free concurrent symmetric SpMV.…”

Section: Concurrent Symmetric Spmvmentioning

confidence: 99%

Sparse matrix-vector multiply on the HICAMP architecture

Stevenson

Firoozshahian

Solomatnikov

et al. 2012

Proceedings of the 26th ACM International Conference on Supercomputing

View full text Add to dashboard Cite

Sparse matrix-vector multiply (SpMV) is a critical task in the inner loop of modern iterative linear system solvers and exhibits very little data reuse. This low reuse means that its performance is bounded by main-memory bandwidth. Moreover, the random patterns of indirection make it difficult to achieve this bound. We present sparse matrix storage formats based on deduplicated memory. These formats reduce memory traffic during SpMV and thus show significantly improved performance bounds: 90x better in the best case. Additionally, we introduce a matrix format that inherently exploits any amount of matrix symmetry and is at the same time fully compatible with non-symmetric matrix code. Because of this, our method can concurrently operate on a symmetric matrix without complicated work partitioning schemes and without any thread synchronization or locking. This approach takes advantage of growing processor caches, but incurs an instruction count overhead. It is feasible to overcome this issue by using specialized hardware as shown by the recently proposed Hierarchical Immutable ContentAddressable Memory Processor, or HICAMP architecture.

show abstract

“…Running algorithms on compressed inputs has been previously explored in the setting of sparse matrix-vector (spMV) multiplication [4,9,17,18,25]. Like graph algorithms, spMV is also a memory-bound computation, and so better improvements are observed in parallel.…”

Section: Introductionmentioning

confidence: 99%

Smaller and Faster: Parallel Processing of Compressed Graphs with Ligra+

Shun

Dhulipala

Blelloch

2015

2015 Data Compression Conference

Self Cite

119

View full text Add to dashboard Cite

We study compression techniques for parallel in-memory graph algorithms, and show that we can achieve reduced space usage while obtaining competitive or improved performance compared to running the algorithms on uncompressed graphs. We integrate the compression techniques into Ligra, a recent shared-memory graph processing system. This system, which we call Ligra+, is able to represent graphs using about half of the space for the uncompressed graphs on average. Furthermore, Ligra+ is slightly faster than Ligra on average on a 40-core machine with hyper-threading. Our experimental study shows that Ligra+ is able to process graphs using less memory, while performing as well as or faster than Ligra. Data Compression Conference

show abstract

Hierarchical Diagonal Blocking and Precision Reduction Applied to Combinatorial Multigrid

Cited by 26 publications

References 35 publications

A simple, combinatorial algorithm for solving SDD systems in nearly-linear time

A simple, combinatorial algorithm for solving SDD systems in nearly-linear time

Sparse matrix-vector multiply on the HICAMP architecture

Smaller and Faster: Parallel Processing of Compressed Graphs with Ligra+

Contact Info

Product

Resources

About