Hierarchical Fault Simulation of Deep Neural Networks on Multi-Core Systems

Abstract

In this paper, a hierarchical fault simulation technique for neural networks is proposed, supporting both permanent and temporary faults. In the proposed technique, different levels of hierarchy are used, forming a mixed-level simulation environment. In such an environment, the pre-synthesis behavioral specification of the network and the post-synthesis gatelevel model are co-simulated. To accelerate the fault simulation process, faults are injected in the gate-level specification of the selected neurons while the behavioral model in different levels of abstraction is used to simulate the remaining neurons. Further speedup is obtained through event-driven simulation and parallelization. Experimental results confirm the time efficiency of the proposed fault simulation technique.

Thread-level Parallelism in Fault Simulation of Deep Neural Networks on Multi-Processor Systems

“…The lowest abstraction level, considered in this paper, is the gate level where stuck-at fault models can be implemented and evaluated. More details of the abstraction level of DNN can be found in [22]. These four abstraction levels are the ones that are used in our proposed fault simulation.…”