2021 IEEE 1st International Power Electronics and Application Symposium (PEAS) 2021
DOI: 10.1109/peas53589.2021.9628556
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High dv/dt in High Voltage SiC IGBT and Method of Suppression

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“…It was also found that by adjusting the drift layer doping, it is possible to lift the PT voltage above the DC bus voltage, but this results in a non-PT design which leads to significantly increased switching losses [5], [6]. More recently, the authors in [7] suggested a two-step buffer design to allow independent control of the breakdown and switching characteristics of the PT IGBT. However, the simulations were performed under low inductive load of 25A/cm 2 , the dV/dt reduction was rather limited, from 200kV/μs to 120kV/μs, and the impact on the on-state voltage drop was not included in the study.…”
Section: Introductionmentioning
confidence: 99%
“…It was also found that by adjusting the drift layer doping, it is possible to lift the PT voltage above the DC bus voltage, but this results in a non-PT design which leads to significantly increased switching losses [5], [6]. More recently, the authors in [7] suggested a two-step buffer design to allow independent control of the breakdown and switching characteristics of the PT IGBT. However, the simulations were performed under low inductive load of 25A/cm 2 , the dV/dt reduction was rather limited, from 200kV/μs to 120kV/μs, and the impact on the on-state voltage drop was not included in the study.…”
Section: Introductionmentioning
confidence: 99%