High-efficiency K-band MMIC power amplifier using multi-harmonic load terminations

Tu, Zhengyuan; Li, Bo; Shang, Yang; Wang, Zhiyu; Wang, Liping; Liu, Dongdong; Zhou, Min; Huang, Zhengliang; Yu, F. Richard

doi:10.1016/j.mejo.2015.07.005

Cited by 2 publications

(1 citation statement)

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“…Harmonic impedances could be treated as almost purely reactive, i.e., the harmonic power contribution is modest, but they still act on the overlap of output V–I waveforms in the time domain, altering P diss . Thus, the second and third harmonic loads were varied one by one along the near periphery of the Smith chart, while keeping Z L,ctr at all fundamentals and the open circuit for other harmonic terminations to investigate the effect of their phase on the PAE of the 46 × 8 μm cell separately [ 14 , 24 ]. As seen from Figure 5 a, the resulting PAE drops remarkably once the optimal phase is reached and curve families show deep notches in the 170–270° range, which indicates that the second harmonic termination leads to an increase in unwanted power dissipation when it is transformed into this phase interval.…”

Section: Circuit Design Considerationsmentioning

confidence: 99%

An Efficient 24–30 GHz GaN-on-Si Driver Amplifier Using Synthesized Matching Networks

et al. 2023

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This paper presents a broadband GaN microwave monolithic integrated circuit driver amplifier (MMIC DA) with compact dimensions of 1.65 mm × 0.78 mm for 5G millimeter-wave communication. The optimal impedance domain satisfying the preset goals was first acquired using the simplified load-pull procedure and small-signal simulations, followed by a weighted average method to determine the reference center matching point from which the optimal intrinsic load can be deduced. By means of de-embedding load-pull contours, modeling based on theoretical analysis, and simulation fitting for parameter identification, the nonlinear output capacitance and a series RLC model circuit approximating the input impedance response of the stabilized transistor were extracted. Under the design principle of fully absorbing the parasitic parameters of the device, explicit formulas and tabulated methods related to the Chebyshev impedance transformer were applied to construct filter-based synthesized matching networks at each stage and finally convert them into an implementable mixed-element form via the single-frequency equivalence technique. Measured on-wafer pulsed results for the proposed two-stage DA across 24–30 GHz demonstrated up to 31.1 dBm of saturated output power (Psat) with less than 1 dB total fluctuation, 19.3 ± 1 dB of small-signal gain, and 39.8% of peak power-added efficiency (PAE) at the mid-frequency.

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Section: Circuit Design Considerationsmentioning

confidence: 99%