High-frequency digital controller IC for DC/DC converters

Patella, B.J.; Prodić, Aleksandar; Zirger, A.; Maksimović, Dragan

doi:10.1109/apec.2002.989273

Cited by 99 publications

(51 citation statements)

References 7 publications

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“…Using a small signal approximation, the open-loop gain function of the original ring without a compensating network can be written as equation (1). Where r on , r l and r C are the switch-tube on-resistance, the equivalent series resistance of the inductance, and the equivalent series resistance of the capacitance, respectively.…”

Section: A Conventional Pid Control Lawmentioning

confidence: 99%

“…1. The purpose of the closed-loop system is primarily to adjust the output voltage V out to match a precise and stable voltage reference V ref over a range of load currents, input voltage values and temperature variations [1].…”

Section: A Conventional Pid Control Lawmentioning

confidence: 99%

“…[1]- [3]. For digital SMPCs, the two most important types of performance are the dynamic performance and the static performance.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

An FPGA-Based Modified Adaptive PID Controller for DC/DC Buck Converters

Ling¹,

Chang²,

Zhou³

et al. 2015

Journal of Power Electronics

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On the basis of the conventional PID control algorithm, a modified adaptive PID (MA-PID) control algorithm is presented to improve the steady-state and dynamic performance of closed-loop systems. The proposed method has a straightforward structure without excessively increasing the complexity and cost. It can adaptively adjust the values of the control parameters (K p , K i and K d ) by following a new control law. Simulation results show that the line transient response of the MA-PID is better than that of the adaptive digital PID because the differential coefficient K d is introduced to changes. In addition, experimental results based on a FPGA indicate that the MA-PID control algorithm reduces the recovery time by 62.5% in response to a 1V line transient, 50% in response to a 500mA load transient, and 23.6% in response to a steady-state deviation, when compared with the conventional PID control algorithm.

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Section: A Conventional Pid Control Lawmentioning

confidence: 99%

Section: A Conventional Pid Control Lawmentioning

confidence: 99%

See 1 more Smart Citation

An FPGA-Based Modified Adaptive PID Controller for DC/DC Buck Converters

Ling¹,

Chang²,

Zhou³

et al. 2015

Journal of Power Electronics

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“…In fact, the ADC in the prototype VRM from Section IV-C used a window structure. The window ADC concept was used in a delay-line ADC [12].…”

Section: Adc Topologymentioning

confidence: 99%

“…D IGITAL controllers are a strong candidate for use in voltage regulation modules (VRMs) due to their low quiescent power, immunity to analog component variations, ease of integration with other digital systems, ability to implement sophisticated control schemes, and potentially faster design process [1]- [12]. In particular, the ability of digital controllers to accurately match multiple pulse-width modulation (PWM) signals, may allow for the use of passive current sharing schemes in multiphase VRMs, thus reducing the units' cost and complexity.…”

Section: Introductionmentioning

confidence: 99%

Architecture and IC implementation of a digital VRM controller

Peterchev

Xiao

Sanders

2003

IEEE Trans. Power Electron.

336

117

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Abstract-This paper develops the architecture of a digital PWM controller for application in multiphase voltage regulation modules (VRMs). In this context, passive current sharing and VRM transient response with nonzero controller delay are analyzed. A scheme for sensing a combination of the VRM output voltage and output current with a single low-resolution window analog-to-digital converter (ADC) is proposed. The architecture and IC implementation of a digital PWM (DPWM) generation module, using a ring-oscillator-multiplexer scheme, is discussed. Experimental results from a prototype VRM and a partial controller IC implementation are presented.

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Design and implementation of a hybrid DPWM under 50 ps resolution based on general‐purpose FPGA

Zhang

et al. 2020

Circuit Theory & Apps

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SummaryHigh‐resolution pulse width modulators are used widely in different fields of electrical engineering, such as dimming of light‐emitting diode (LED) lighting, motor control, RF modulators, audio amplifiers, and switch‐mode power supplies. To realize a high‐resolution digital pulse‐width modulator (DPWM) in a limited inner system clock, a simple implementation of a hybrid DPWM with the resolution under 50 ps based on a general‐purpose field‐programmable gate array (FPGA) is described. The multiplexer device implementing the fast carry‐chain path and an AND gate controlling the selection input are used as a delay unit. The manual routing or placement is not required in the proposed approach, which just needs some conditional constraints. Some different conditional constraints influencing the monotonicity and resolution of DPWM are discussed. Finally, a 1 MHz switching frequency DPWM with 40 ps resolution is experimentally demonstrated, with high monotonicity and linearity. Further, a synchronous buck with and without this high‐resolution DPWM is experimentally compared to illustrate the regulation resolution.

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High-frequency digital controller IC for DC/DC converters

Cited by 99 publications

References 7 publications

An FPGA-Based Modified Adaptive PID Controller for DC/DC Buck Converters

An FPGA-Based Modified Adaptive PID Controller for DC/DC Buck Converters

Architecture and IC implementation of a digital VRM controller

Design and implementation of a hybrid DPWM under 50 ps resolution based on general‐purpose FPGA

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