High K Nanophase Zinc Oxide on Biomimetic Silicon Nanotip Array as Supercapacitors

Abstract

A 3D trenched-structure metal-insulator-metal (MIM) nanocapacitor array with an ultrahigh equivalent planar capacitance (EPC) of ~300 μF cm(-2) is demonstrated. Zinc oxide (ZnO) and aluminum oxide (Al2O3) bilayer dielectric is deposited on 1 μm high biomimetic silicon nanotip (SiNT) substrate using the atomic layer deposition method. The large EPC is achieved by utilizing the large surface area of the densely packed SiNT (!5 × 10(10) cm(-2)) coated conformally with an ultrahigh dielectric constant of ZnO. The EPC value is 30 times higher than those previously reported in metal-insulator-metal or metal-insulator-semiconductor nanocapacitors using similar porosity dimensions of the support materials.

Microcapacitors for Energy Storage: General Characteristics and Overview of Recent Progress

“…Routes to increase the capacitance density of solid‐state microcapacitors include the increase in the dielectric permittivity of the insulator (use of high‐ k dielectrics), the decrease in the oxide thickness, and the increase in microcapacitor surface area. One way to increase the effective electrode area without increasing the footprint area of the device is by 3D nanostructuring of the electrodes . Another approach reported in the literature is the use of stacks of MIM capacitors on a 3D‐structured Si substrate as a means to increase the total capacitance areal density …”

“…They are both based on the parallel‐plate capacitor configuration with 3D‐structured electrodes. In the first approach, shown in Figure a, a 3D‐structured substrate is used which is either a semiconductor or a metal, on which the dielectric and top electrode are deposited, following its morphology . The capacitors have thus either the MIS or MIM configuration.…”

“…Furthermore, the possibility of using highly conducting materials as electrodes, in combination with the absence of the electrolyte, offers the possibility of achieving very low series resistances, especially in the first integration scheme discussed earlier. Series resistance values much smaller than 1 Ω have been reported for such capacitors . Moreover, the high‐ k dielectric materials used as insulators permit much larger voltages across the capacitor, as well as much smaller leakage currents than those obtained in microsupercapacitors.…”

“…Moreover, the high‐ k dielectric materials used as insulators permit much larger voltages across the capacitor, as well as much smaller leakage currents than those obtained in microsupercapacitors. Operational voltages up to 10 V and leakage currents as low as 8.4 × 10 −10 A cm −2 have been reported. Finally, much larger frequencies of operation are possible as a result of the lower series resistance, with frequencies higher than 1 MHz demonstrated .…”

“…Operational voltages up to 10 V and leakage currents as low as 8.4 × 10 −10 A cm −2 have been reported. Finally, much larger frequencies of operation are possible as a result of the lower series resistance, with frequencies higher than 1 MHz demonstrated . In contrast, the main disadvantage of the solid‐state microcapacitors as compared to microsupercapacitors is the lower capacitance areal density achieved.…”