2012 4th International Conference on Intelligent and Advanced Systems (ICIAS2012) 2012
DOI: 10.1109/icias.2012.6306132
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High level fault modeling and fault propagation in analog circuits using NLARX automated model generation technique

Abstract: It is known that fault modeling and fault propagation in analog circuits are extremely important and more challenging than in digital circuits. Several automated model generation (AMG) techniques are developed to model the nonlinear behavior of faulty analog circuits. However, most of the modeling techniques are performed under the MATLAB environment which is impractical and the models cannot be utilized in electronic circuits. To perform high level fault modeling (HLFM) and fault propagation (FP) on system le… Show more

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Cited by 10 publications
(2 citation statements)
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“…Therefore, realizing soft fault diagnosis at the component level is still challenging. Over the past few decades, numerous scholars have delved into this field, proposing various types of fault diagnostic approaches [3][4][5][6]. The field of artificial intelligence has experienced remarkable advancement in recent years, enabling the formulation and successful application of various deep learning models for fault diagnosis due to their excellent independent feature extraction capabilities and outstanding complex process generalization capabilities [7,8].…”
Section: Introductionmentioning
confidence: 99%
“…Therefore, realizing soft fault diagnosis at the component level is still challenging. Over the past few decades, numerous scholars have delved into this field, proposing various types of fault diagnostic approaches [3][4][5][6]. The field of artificial intelligence has experienced remarkable advancement in recent years, enabling the formulation and successful application of various deep learning models for fault diagnosis due to their excellent independent feature extraction capabilities and outstanding complex process generalization capabilities [7,8].…”
Section: Introductionmentioning
confidence: 99%
“…A high level fault modeling method proposed in Ref. [10] is used to model transistor level analog faults. In Ref.…”
Section: Introductionmentioning
confidence: 99%