High-Level Modeling of Analog Computational Elements for Signal Processing Applications

Schlottmann, Craig; Hasler, Jennifer

doi:10.1109/tvlsi.2013.2280718

Cited by 17 publications

(13 citation statements)

References 24 publications

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“…The design tools (and abstractions) [38,39], infrastructure [40] and FPAA ICs [1] developed have reached a stable point, across multiple IC fabrication processes [41], where they are used in educational [40] and research environments. The open-source design tool framework utilizes a graphical, high-level data flow language and automatically compiles, places, routes and programs the configurable IC, as well as macro-modeled simulation of the system (Figure 4).…”

Section: Digital Computationmentioning

confidence: 99%

“…Noise modeling for analog computation is an essential aspect of system level simulation required for modeling measured responses. Analog system design tools already are starting to have this modeling [38]. This noise increases the derivatives of the function evaluation, further complicating the digital noise in the resulting system.…”

Section: Simulation Tool Impact Of Analog and Digital Numericsmentioning

confidence: 99%

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Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Hasler

2017

JLPEA

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Abstract:The focus of this work is to develop a starting framework for analog numerical analysis and related algorithm questions. Digital computation is enabled by a framework developed over the last 80 years. Having an analog framework enables wider capability while giving the designer tools to make reasonable choices. Analog numerical analysis concerns computation on physical structures utilizing the real-valued representations of that physical system. This work starts the conversation of analog numerical analysis, including exploring the relevancy and need for this framework. A complexity framework based on computational strengths and weaknesses builds from addressing analog and digital numerical precision, as well as addresses analog and digital error propagation due to computation. The complimentary analog and digital computational techniques enable wider computational capabilities.

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Section: Digital Computationmentioning

confidence: 99%

Section: Simulation Tool Impact Of Analog and Digital Numericsmentioning

confidence: 99%

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Hasler

2017

JLPEA

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“…1(b), it can be seen that the drain and source terminals of P1 and P2 are connected to each other and the input voltages V 1 and V 2 control the drain currents which are summed in the diode-connected PMOS [2]. The output voltage of the combiner can be expressed as …”

Section: Basic Cellmentioning

confidence: 99%

“…Commonly used in analog computational systems such as modulation, frequency doubling, rectification, and gain amplification, four quadrant multiplier especially focus on low power consumption performance [1,2] for wireless sensor network chip. Driven by the early work of Gilbert which was implemented using BJT [3], many multipliers have been reported specially in CMOS technology based on the current mode and voltage mode topologies.…”

Section: Introductionmentioning

confidence: 99%

Voltage-mode ultra-low power four quadrant multiplier using subthreshold PMOS

Xin

Cai

Wang

2017

IEICE Electron. Express

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A voltage-mode ultra low power four quadrant analog multiplier using subthreshold PMOS is presented in this paper. PMOS substract cell and combiner cell operating in the subthreshold region are used to lower the voltage-mode multiplier power consumption. Simulation results of the multiplier demonstrate a linearity error of 0.8%, a maximum THD of 4%, a −3 dB bandwidth of 1.4 MHz, and a power consumption of 77 nW with 100 fF load capacitor at a supply voltage of 0.6 V using a TSMC 0.18 um CMOS process.

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“…Moreover, depending on the application, there might be no need for additional A/D conversion [4]. Analog signal processing is already advantageously used for low-power low-frequency applications [22] and is gaining momentum for applications in the millimeterwave frequency range [20].…”

Section: Introductionmentioning

confidence: 99%

Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

Oliveri

Mohamad

Teich

et al. 2016

J Sign Process Syst

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Despite the progress made in digital signal processing during the last decades, the constraints imposed by high data rate communications are becoming ever more stringent. Moreover mobile communications raised the importance of power consumption for sophisticated algorithms, such as channel equalization or decoding. The strong link existing between computational speed and power consumption suggests an investigation of signal processing with energy efficiency as a prominent design choice. In this work we revisit the topic of signal processing with analog circuits and its potential to increase the energy efficiency. Channel equalization is chosen as an application of nonlinear signal processing, and a vector equalizer based on a recurrent neural network structure is taken as an example to demonstrate what can be achieved with state of the art in VLSI design. We provide an analysis of the equalizer, including the analog circuit design, system-level simulations, and comparisons with the theoretical algorithm.First measurements of our analog VLSI circuit confirm the possibility to achieve an energy requirement of a few pJ/bit, which is an improvement factor of three to four orders of magnitude compared with today's most energy efficient digital circuits.

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High-Level Modeling of Analog Computational Elements for Signal Processing Applications

Cited by 17 publications

References 24 publications

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Starting Framework for Analog Numerical Analysis for Energy-Efficient Computing

Voltage-mode ultra-low power four quadrant multiplier using subthreshold PMOS

Advanced Low Power High Speed Nonlinear Signal Processing: An Analog VLSI Example.

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