Proceedings of 1996 International Symposium on Low Power Electronics and Design
DOI: 10.1109/lpe.1996.542726
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High-level power estimation

Abstract: The growing demand for portable electronic devices has led to an increased emphasis on power consumption within the semiconducror industry. As a result, designers are now encouraged to consider the impact of their decisions not only on speed and area, but also on power throughout the entire design process. In order to evaluate how well a particular design variant meets power constraints, engineers often rely on CAD tools for power estimation. While tools have long existed for analyzing power consumption at the… Show more

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Cited by 98 publications
(52 citation statements)
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“…Microarchitecture-level power models are commonly used to investigate and evaluate new power-saving and power-aware hardware and architectures. Such models correlate power to parameters and usage of architectural components including register files, function units, clock, and caches [35][36][37]. Representative models include Wattch [35] for single-core architectures and McPat [37] for chip multiprocessors.…”
Section: Related Workmentioning
confidence: 99%
“…Microarchitecture-level power models are commonly used to investigate and evaluate new power-saving and power-aware hardware and architectures. Such models correlate power to parameters and usage of architectural components including register files, function units, clock, and caches [35][36][37]. Representative models include Wattch [35] for single-core architectures and McPat [37] for chip multiprocessors.…”
Section: Related Workmentioning
confidence: 99%
“…While several power estimation techniques have been proposed in the literature at the gate, circuit and layout levels, a few papers have been published addressing the power estimation problem at high-level until recently [7,10], despite of the increasing interest in the system and behavioral levels design. A state-of-the-art survey of the high-level power estimation has been presented in [10]. According to this survey, high-level power estimation techniques can be classified depending on their abstraction level.…”
Section: Previous Work On High-level Power Estimationmentioning
confidence: 99%
“…For the estimation of the average power of the functional units, we use complexity-based analytical models [10], where the complexity of each functional unit is described in terms of equivalent gates. For the estimation of the number of equivalent gates necessary to implement a given function of the data-path, we use a library of macro-modules such as adders, multipliers, etc..…”
Section: P Fu Estimationmentioning
confidence: 99%
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“…Designers have to estimate the power consumption at design phase to understand whether more improvements are required. Therefore, a number of power estimation techniques [1,2] have been proposed to estimate the power consumption at a high level of abstraction. One common strategy of highlevel power estimation is building the power models for the composing modules.…”
Section: Introductionmentioning
confidence: 99%