High level programming of FPGAs for HPC and data centric applications

Segal, Oren; Nasiri, Nasibeh; Margala, Martin; Vanderbauwhede, Wim

doi:10.1109/hpec.2014.7040979

Cited by 16 publications

(7 citation statements)

References 5 publications

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“…For supercomputer clusters, the dominant factor is the energy consumption and therefore we need to consider the performance per Watt. From that perspective, the picture is quite different: the measured power consumption of the FPGA board is 25 W (Segal et al, 2014); the host CPU consumes 160 W (not including RAM power consumption). So already the FPGA simulation has more than 3× better performance per Watt than the CPU.…”

Section: Discussionmentioning

confidence: 99%

Investigating hardware acceleration for simulation of CFD quantum circuits

2022

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Among the many computational models for quantum computing, the Quantum Circuit Model is the most well-known and used model for interacting with current quantum hardware. The practical implementation of quantum computers is a very active research field. Despite this progress, access to physical quantum computers remains relatively limited. Furthermore, the existing machines are susceptible to random errors due to quantum decoherence, as well as being limited in number of qubits, connectivity and built-in error correction. Simulation on classical hardware is therefore essential to allow quantum algorithm researchers to test and validate new algorithms in a simulated-error environment. Computing systems are becoming increasingly heterogeneous, using a variety of hardware accelerators to speed up computational tasks. One such type of accelerators, Field Programmable Gate Arrays (FPGAs), are reconfigurable circuits that can be programmed using standardized high-level programming models such as OpenCL and SYCL. FPGAs allow to create specialized highly-parallel circuits capable of mimicking the quantum parallelism properties of quantum gates, in particular for the class of quantum algorithms where many different computations can be performed concurrently or as part of a deep pipeline. They also benefit from very high internal memory bandwidth. This paper focuses on the analysis of quantum algorithms for applications in computational fluid dynamics. In this work we introduce novel quantum-circuit implementations of model lattice-based formulations for fluid dynamics, specifically the D1Q3 model using quantum computational basis encoding, as well as, efficient simulation of the circuits using FPGAs. This work forms a step toward quantum circuit formulation of the Lattice Boltzmann Method (LBM). For the quantum circuits implementing the nonlinear equilibrium distribution function in the D1Q3 lattice model, it is shown how circuit transformations can be introduced that facilitate the efficient simulation of the circuits on FPGAs, exploiting their fine-grained parallelism. We show that these transformations allow us to exploit more parallelism on the FPGA and improve memory locality. Preliminary results show that for this class of circuits the introduced transformations improve circuit execution time. We show that FPGA simulation of the reduced circuits results in more than 3× improvement in performance per Watt compared to the CPU simulation. We also present results from evaluating the same kernels on a GPU.

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Section: Discussionmentioning

confidence: 99%

Investigating hardware acceleration for simulation of CFD quantum circuits

2022

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“…At the same time, recent literature proposes ixedfunction accelerators such as for artiicial intelligence [11,61,68]. Further work has demonstrated reconigurable accelerators that rely on ield programmable gate arrays (FPGAs) [40,70] or ASICs [81]. Consequently, past work has examined how job scheduling should consider heterogeneous resource requests [8,30], how the operating system (OS) and runtime should adapt [42,57], how to write applications for heterogeneous systems [8,32], how to partition data-parallel applications onto heterogeneous compute resources [48], how to consider the diferent fault tolerances of heterogeneous resources [41], how to fairly compare the performance of diferent heterogeneous systems [44], and what the impact of heterogeneous resources is to application performance [52,74,80].…”

Section: Background and Related Work 21 Resource Heterogeneity In Hpcmentioning

confidence: 99%

“…Future high performance computing (HPC) systems are driven towards heterogeneity of compute and memory resources in response to the expected halt of traditional technology scaling, combined with continuous demands for increased performance [56,78] and the wide landscape of HPC applications [69]. In the long term, many HPC systems are expected to feature a variety of graphical processing units (GPUs), partially-programmable accelerators [62,77], ixed-function accelerators [11,61,68], reconigurable accelerators such as ield programmable gate arrays (FPGAs) [40,70], and new classes of memory [80] that blur the line between memory and storage technology.…”

Section: Introductionmentioning

confidence: 99%

A Case For Intra-rack Resource Disaggregation in HPC

Klenk

Cook

Teh

et al. 2022

ACM Trans. Archit. Code Optim.

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The expected halt of traditional technology scaling is motivating increased heterogeneity in high performance computing (HPC) systems with the emergence of numerous specialized accelerators. As heterogeneity increases, so does the risk of underutilizing expensive hardware resources if we preserve today’s rigid node configuration and reservation strategies. This has sparked interest in resource disaggregation to enable finer-grain allocation of hardware resources to applications. However, there is currently no data-driven study of what range of disaggregation is appropriate in HPC. To that end, we perform a detailed analysis of key metrics sampled in NERSC’s Cori, a production HPC system that executes a diverse open-science HPC workload. In addition, we profile a variety of deep learning applications to represent an emerging workload. We show that for a rack (cabinet) configuration and applications similar to Cori, a central processing unit (CPU) with intra-rack disaggregation has a 99.5% probability to find all resources it requires inside its rack. In addition, ideal intra-rack resource disaggregation in Cori could reduce memory and NIC resources by 5.36% to 69.01% and still satisfy the worst-case average rack utilization.

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“…According to Segal et al [16], heterogeneous computing is a potential approach for high-performance and energyefficient computing. Till now, the high-performance heterogeneous computing industry was dominated by discrete GPUs, but new options based on APUs and FPGAs have emerged.…”

Section: Review Of the Literaturementioning

confidence: 99%

Sixth-Generation (6G) Mobile Cloud Security and Privacy Risks for AI System Using High-Performance Computing Implementation

Gundu¹,

Charanarur

Chandelkar

et al. 2022

Wireless Communications and Mobile Computing

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The exchange of information from one person to another is called communication. Telecommunication makes it possible with electronic devices and their tools. The scientist Alexander Graham Bell has invented the basic telephone in 1876 in the USA. Telephones now have the new format in the form of mobile phones, which are the primary media for communicating and transmitting data. We are using 5th-generation mobile network standards. Still, there are some requirements for the users that are believed to be solved in the 6th-generation mobile network standards. By 2030, all of the people would be using 6G. The computing model in the cloud is not dependent on either the location or any specific device that would provide the service. It is an on-demand computational service-oriented mechanism. Combining these two technologies as mobile cloud computing provides customized options with more flexible implementations. Artificial intelligence is being used in devices in many fields. AI can be used in mobile network services (MNS) to provide more reliable and customized services to the users, such as network operation monitoring, network operation management, fraud detection, and reduction in mobile transactions and security to the cyber devices. Combining cloud with AI in mobile network services in the 6th generation would improve human beings’ lives, such as zero road accidents, advanced level special health care, and zero crime rates in society. However, the most vital needs for sixth-generation standards are the capability to manage large volumes of records and excessive-statistics-fee connectivity in step with gadgets. The sixth-generation mobile network is under development. This generation has many exciting features. Security is the central issue that needs to be sorted out using appropriate forensic mechanisms. There is a need to approach high-performance computing for improved services to the end-user. Considering three-dimensional research methodologies (technical dimension, organizational dimension, and applications hosted on the cloud) in a high-performance computing environment leads to two different cases such as real-time stream processing and remote desktop connection and performance test. By ‘narrowing the targeted worldwide audience with a wide range of experiential opportunities,’ this paper is aimed at delivering dynamic and varied resource allocation for reliable and justified on-demand services.

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High level programming of FPGAs for HPC and data centric applications

Cited by 16 publications

References 5 publications

Investigating hardware acceleration for simulation of CFD quantum circuits

Investigating hardware acceleration for simulation of CFD quantum circuits

A Case For Intra-rack Resource Disaggregation in HPC

Sixth-Generation (6G) Mobile Cloud Security and Privacy Risks for AI System Using High-Performance Computing Implementation

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