High level software synthesis for signal processing systems

Abstract

For the design of compkz digital signal proceesing systems, block d i a g " oriented s i mulation ha8 become a widely accepted standad. Current reseamh is concerned with the m p l i n g of hetenyenous simulation engines and the Lronsition simulation to the impkmmtahn of digital a & d p n x e 8 s h g systems. Due to the disFcuicy in mastering eompkz design epaces high level harumre and softwaw synthesis is becoming i&ngly important.I n this p8entation we Concentmte on the block d i a g " oriented sofhwre synthesis of digital signal pnxessing systems for pmgmmmabk pmcessors, such as digital signal pnxessors (DSP). We present the synthesis enmnmment DESCARTES illustmting m e 1 0ptimi.m tion stmtegies. P h k n w r e we discuss goal d i d softwm synthesis, by which code is interoetimdy or automatically genemted, which can be adapted to the applioation @jie needs imposed by constmints on "oty space, sampling mte or latency.

A scenario-aware data flow model for combined long-run average and worst-case performance analysis

“…SADF can express this behaviour by considering the differences in rates as distinct scenarios and fixing the occurrence sequence in the stochastic model associated with each detector. In Scalable Synchronous Data Flow (SSDF) [16], integer multiples of the rates in a consistent SDF can be used, where these multiples are fixed by an external scheduler. An SADF model can capture the occurrence of the different rates (scenarios) by modelling the scheduler in the detectors.…”

Hardware/Software Cosynthesis of DSP Systems

“…These can be divided into three major groups -the decidable dataflow models, which, like SDF, enable bounded memory and deadlock determination to be solved at compile time; the dynamic dataflow models, in which there is sufficient dynamism and expressive power that the bounded memory and deadlock problems become undecidable; and the dataflow meta-models, which are model-independent mechanisms for adding expressive power to broad classes of dataflow modeling approaches. Decidable dataflow models include SDF; cyclo-static dataflow [12] and scalable synchronous dataflow [44], which we discuss in Sections 2.4 and 6, respectively; and multidimensional synchronous dataflow [35] for expressing multidimensional DSP applications, such as those arising in image and video processing. Dynamic dataflow models include boolean dataflow and integer-controlled dataflow [14,15], and bounded dynamic dataflow [41].…”

The CBP Parameter: A Module Characterization Approach for DSP Software Optimization

“…To illustrate the practical impact of CBP-based analysis, we provide in Table 4 the overall buffer memory requirements from our hybrid SDF compiler that combines CBP-based buffer merging and lifetime analysis techniques for several practical systems specified as SDF graphs [15]. The systems tested here include a QMF filter bank [33], an FFT-based spectral analysis system [32], a satellite receiver [2], a CD to DAT sample-rate converter, and a phased-array system [32].…”

“…Numerous commercial and research-oriented design tools for DSP have proliferated in recent years, such as System Canvas [1] from Angeles Design Systems, COSSAP [2] from the Aachen University of Technology (now from Synopsys), GRAPE [3] from K. U. Leuven, Ptolemy [4] from U. C. Berkeley, SPW from Cadence, and ADS from Hewlett Packard. Raising the level of abstraction in system-level design has been recognized as a key step that facilitates faster design cycles, easier retargeting, and verification.…”