High Level Synthesis of VLSI Based Image Scaling Architecture for High Definition Displays

Chidadala, Janardhan; Kota, Venkata Ramanaiah; Babulu, K.

doi:10.1007/978-981-13-8461-5_22

ICICCT 2019 – System Reliability, Quality Control, Safety, Maintenance and Management 2019

DOI: 10.1007/978-981-13-8461-5_22

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High Level Synthesis of VLSI Based Image Scaling Architecture for High Definition Displays

Janardhan Chidadala

Venkata Ramanaiah Kota

K. Babulu

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High Level Synthesis of VLSI Based Image Scaling Architecture for High Definition Displays

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References 13 publications

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