Proceedings of IEEE International Electron Devices Meeting
DOI: 10.1109/iedm.1993.347383
|View full text |Cite
|
Sign up to set email alerts
|

High performance 0.1 μm CMOS devices with 1.5 V power supply

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
13
0

Publication Types

Select...
5
2
2

Relationship

1
8

Authors

Journals

citations
Cited by 68 publications
(13 citation statements)
references
References 8 publications
0
13
0
Order By: Relevance
“…For the bulk and PDSOI CMOS in this work, the extracted is about 0.47 V, which is close to the longchannel value extrapolated at maximum transconductance of the linear drain current. 1 This indicates that devices in the ring oscillator have little roll-off. Fig.…”
Section: A Scheme To Compare Delaymentioning
confidence: 96%
See 1 more Smart Citation
“…For the bulk and PDSOI CMOS in this work, the extracted is about 0.47 V, which is close to the longchannel value extrapolated at maximum transconductance of the linear drain current. 1 This indicates that devices in the ring oscillator have little roll-off. Fig.…”
Section: A Scheme To Compare Delaymentioning
confidence: 96%
“…In this work sub-tenth-micron CMOS devices and circuits were fabricated on bulk and SOI substrates. The device fabrication processes were similar to that in [1]. The gate level was patterned using X-ray lithography, enabling high resolution and high throughput.…”
Section: Device Fabrication and Performancementioning
confidence: 99%
“…Indium was recommended for fabricating steep retrograde channel profiles due to the heavy ion atom and the strong segregation to oxide [1]- [3], and shallow source-drain extensions with pre-amorphization for the dechanneling [4], [5]. For indium pocket profiling, two approaches, that is, low-dose tilted ion implantation [6] and high-dose ion implantation [7], have been explored.…”
Section: Introductionmentioning
confidence: 99%
“…Due to the confinement of their motion in the direction normal to the surface, electrons in the inversion layer must be treated quantum mechanically as a two-dimensional electron gas (2-DEG) rather than classically as a three-dimensional (3-D) gas [12]. The gate leakage current increases exponentially with decreasing oxide thickness.…”
Section: Gate Oxidementioning
confidence: 99%