High-performance Acetone Soluble Tape Transfer Printing Method for Heterogeneous Integration

Zhang, Jiaqi; Wu, Yichang; Li, Zhe; Zhang, Yachao; Peng, Yue; Chen, Dazheng; Xu, Shengrui; Zhang, Chunfu

doi:10.1038/s41598-019-52235-0

Cited by 14 publications

(16 citation statements)

References 20 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The additional disadvantage is the deformation of the elastic stamp when it is subjected to external forces, which in turn causes the displacement of the transferred devices. For these reasons, a wide range of other stamps made from different materials have also been explored [ 102 , 135 , 242 , 251 , 252 , 253 , 254 , 255 , 256 ], including polyimide, gecko-inspired adhesive, tape, polymethyl methacrylate (PMMA), shape-memory polymer, etc. Some of them, such as gecko-inspired adhesive and shape-memory polymer stamps, have reversible adhesion switching capabilities, which means they can be used for repeated transfer processes [ 135 , 253 , 257 ].…”

Section: Chip-scale Transfer Techniquesmentioning

confidence: 99%

“…Modifications of the stamp transfer printing technique have also led to the evolution of a wide range of other chip transfer approaches, including tape-assisted transfer printing [ 102 , 242 , 251 ], roll-to-roll printing [ 100 ], and laser-driven non-contact printing [ 261 ]. Most of these methods rely on the modulation of the interfacial adhesion strength of the stamp/device interface.…”

Section: Chip-scale Transfer Techniquesmentioning

confidence: 99%

“…Tape-assisted transfer exploits the use of commercial tapes to replace conventional PDMS stamps for chip-scale transfer [ 102 , 144 , 242 , 251 ]. Such tapes commonly have larger adhesion switchability than conventional PDMS stamps, and therefore they are well suited for high-yield pickup of the devices.…”

Section: Chip-scale Transfer Techniquesmentioning

confidence: 99%

See 2 more Smart Citations

Layer-Scale and Chip-Scale Transfer Techniques for Functional Devices and Systems: A Review

Gong

2021

Nanomaterials

View full text Add to dashboard Cite

Hetero-integration of functional semiconductor layers and devices has received strong research interest from both academia and industry. While conventional techniques such as pick-and-place and wafer bonding can partially address this challenge, a variety of new layer transfer and chip-scale transfer technologies have been developed. In this review, we summarize such transfer techniques for heterogeneous integration of ultrathin semiconductor layers or chips to a receiving substrate for many applications, such as microdisplays and flexible electronics. We showed that a wide range of materials, devices, and systems with expanded functionalities and improved performance can be demonstrated by using these technologies. Finally, we give a detailed analysis of the advantages and disadvantages of these techniques, and discuss the future research directions of layer transfer and chip transfer techniques.

show abstract

Section: Chip-scale Transfer Techniquesmentioning

confidence: 99%

Section: Chip-scale Transfer Techniquesmentioning

confidence: 99%

See 1 more Smart Citation

Layer-Scale and Chip-Scale Transfer Techniques for Functional Devices and Systems: A Review

Gong

2021

Nanomaterials

View full text Add to dashboard Cite

show abstract

“…Therefore, it is extremely urgent to integrate monocrystalline silicon devices and compound semiconductor devices through heterogeneous integration to meet the development requirements of ultra-miniaturization, intelligence, and diversification of electronic systems, and to break through the limitations of silicon bulk materials. There are several methods in the current stage of heterogeneous integration technology, such as epitaxial growth, bonding, three-dimensional packaging, and transfer printing [2][3][4][5][6][7][8][9]. This article mainly studies the transfer technology applied in the field of heterogeneous integration.…”

Section: Introductionmentioning

confidence: 99%

Optimization of Sacrificial Layer Etching in Single-Crystal Silicon Nano-Films Transfer Printing for Heterogeneous Integration Application

Zhang

Yang

et al. 2021

Nanomaterials

Self Cite

View full text Add to dashboard Cite

As one of the important technologies in the field of heterogeneous integration, transfer technology has broad application prospects and unique technical advantages. This transfer technology includes the wet chemical etching of a sacrificial layer, such that silicon nano-film devices are released from the donor substrate and can be transferred. However, in the process of wet etching the SiO2 sacrificial layer present underneath the single-crystal silicon nano-film by using the transfer technology, the etching is often incomplete, which seriously affects the efficiency and quality of the transfer and makes the device preparation impossible. This article analyzes the principle of incomplete etching, and compares the four factors that affect the etching process, including the size of Si nano-film on top of the sacrificial layer, the location of the anchor point, the shape of Si nano-film on top of the sacrificial layer, and the thickness of the sacrificial layer. Finally, the etching conditions are obtained to avoid the phenomenon of incomplete etching of the sacrificial layer, so that the transfer technology can be better applied in the field of heterogeneous integration. Additionally, Si MOSFETs (Metal-Oxide-Semiconductor Field Effect Transistors) on sapphire substrate were fabricated by using the optimized transfer technology.

show abstract

“…Alternatively, micro-LED arrays can be made from masstransfer technologies, which use a transfer head that picks up a large array of chips from the source wafer and transfers them to the target substrate. So far, there are various mass-transfer technologies developed, [25][26][27][28][29][30][31][32][33][34][35][36][37] but only few have been succeeded. Transfer yield, misalignment, and displacement error are still the major obstacles (see more details in Section S1 and Figure S1, Supporting Information).…”

Section: Introductionmentioning

confidence: 99%

Wafer‐Scale Micro‐LEDs Transferred onto an Adhesive Film for Planar and Flexible Displays

Pan

Guo

Wang

et al. 2020

Adv Materials Technologies

View full text Add to dashboard Cite

technology because of its higher brightness, lower power consumption, and faster response than OLED and LCD technologies. [1-5] They are expected to be suited for many applications in the brightnesssensitive or power-sensitive environments such as wearable devices, optogenetics, outdoor displays, and AR/VR. [6-13] Despite these attractive advantages, fabricating high-resolution micro-LED displays is proven to be very challenging because accurately assembling millions of micro-LEDs onto a driving circuit requires complicated transfer and bonding process. [3,14] A scalable active-driven micro-LED display device is primarily composed of two major parts: a micro-LED array, and a driver backplane. [14-20] In order to generate any display pattern, the micro-LED array must be electrically connected to the pads on the driver backplane. This is most commonly achieved by flip-chip bonding technologies such as bump bonding and anisotropic conductive film (ACF) bonding, [13] whereas in some cases it can be done using via filling or metal wiring technology. [3,4,21] The latter technology is not preferred, because for high-resolution display, both metal wires and vias occupy extra space. In the course of bonding, the small chip size may incur serious registration/alignment errors, resulting in forming display defects. Therefore, the fabrication of a micro-LED display device involves two challenging processes: i) assembling millions of micro-LED chips in a fast, accurate, and low-cost manner, and ii) reliably bonding the micro-LEDs onto the driver circuit with minimized displacement. Micro-LED arrays can be made in a monolithic manner, without using tedious pick-and-place technology. [12] In a monolithic approach, an array of micropixels is formed simultaneously on the same native substrate using only a lithography process, and all these pixels on the same substrate are then integrated onto a driver backplane via one-time flip-chip bonding. Optionally, the sapphire can be taken off by laser liftoff (LLO), [21,22] in order to suppress the optical crosstalk and beam divergence induced by the thick substrate. [23,24] Flip-chip bonding is a proven technology which is fast and compatible with wafer-level bonding. Furthermore, it can improve the light-emitting efficiency because of less light absorption caused The development of micro-sized light emitting diode (LED) displays has driven the research of micro-LED mass-transfer technology. To date, various transfer technologies are proposed, but ample room for improvements in the transfer yield and transfer accuracy still remains. Furthermore, whether these techniques are suited for the subsequent bonding process is not well investigated, which is essential for achieving a good electric connection between micro-LEDs and driver electronics. Here a systematical solution, termed as "tape-assisted laser transfer," which is not only suited for high-yield micro-LED transfer but also well compatible with subsequent bonding process, is developed. Using a low-cost adhesive tape as the support s...

show abstract

High-performance Acetone Soluble Tape Transfer Printing Method for Heterogeneous Integration

Cited by 14 publications

References 20 publications

Layer-Scale and Chip-Scale Transfer Techniques for Functional Devices and Systems: A Review

Layer-Scale and Chip-Scale Transfer Techniques for Functional Devices and Systems: A Review

Optimization of Sacrificial Layer Etching in Single-Crystal Silicon Nano-Films Transfer Printing for Heterogeneous Integration Application

Wafer‐Scale Micro‐LEDs Transferred onto an Adhesive Film for Planar and Flexible Displays

Contact Info

Product

Resources

About