2023
DOI: 10.1142/s0218126623502948
|View full text |Cite
|
Sign up to set email alerts
|

High Performance FPGA Implementation of Single MAC Adaptive Filter for Independent Component Analysis

Abstract: Blind source separation (BSS) is the process of extracting sources from mixed data without or with limited awareness of the sources. This paper uses field programmable gate array (FPGA) to create an effective version of the Blind source separation algorithm (ICA) with a single Multiply Accumulate (MAC) adaptive filter and to optimize it. Recently, space research has paid a lot of attention to this technique. We address this problem in two sections. The first approach is ICA, which seeks a linear revolution tha… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1

Citation Types

0
4
0

Year Published

2023
2023
2025
2025

Publication Types

Select...
7

Relationship

1
6

Authors

Journals

citations
Cited by 10 publications
(4 citation statements)
references
References 10 publications
0
4
0
Order By: Relevance
“…In this procedure, an adaptive filter is used after the ICA. Numerous algorithms and designs have been developed in recent decades, but their implementation in portable, lowpower devices requires a significant amount of processing time and space, which increases resource complexity [18,19]. The presented work demonstrates superior improvement in the area and power for emotion identification while being implemented in FPGA in order to overcome these difficulties.…”
Section: Related Workmentioning
confidence: 99%
“…In this procedure, an adaptive filter is used after the ICA. Numerous algorithms and designs have been developed in recent decades, but their implementation in portable, lowpower devices requires a significant amount of processing time and space, which increases resource complexity [18,19]. The presented work demonstrates superior improvement in the area and power for emotion identification while being implemented in FPGA in order to overcome these difficulties.…”
Section: Related Workmentioning
confidence: 99%
“…On the contrary, the multiplexing strategy possesses superiority in terms of resourcesaving, although its calculation speed is relatively low. In [31], the multipliers are utilized by the time division-based method, significantly reducing hardware complexity while also improving calculation speed. The initial application of the layer multiplexing method to the neural network calculation can be traced back to [32], where the complete neural network calculation was achieved by continuously multiplexing the resources of a single layer.…”
Section: Related Workmentioning
confidence: 99%
“…The s i and R i are scale and rotation factors, respectively, used in the ST to warp the shape and fit the face. The minimization of the mean square error, between the actual q value and the one estimated with Equation (6), is used to calculate the optimal values for s i and R i .…”
Section: Background Of the Ert Modelmentioning
confidence: 99%
“…For example, one of the authors of this paper has implemented a Convolutional Neural Network (CNN) grinder in FPGA as described in [ 5 ]. Multiply-Accumulate operations required, e.g., in digital filters have also been proposed for FPGA implementation [ 6 ]. In [ 7 ], Kosuge et al implement a pose estimation algorithm on a Xilinx FPGA platform reporting a power consumption equal to 6 W. The authors in [ 7 ] developed an application for pose estimation using a Xilinx ZYBO7010 FPGA where inputs from different sensors are combined.…”
Section: Introductionmentioning
confidence: 99%