2021
DOI: 10.1016/j.mejo.2021.105079
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High-performance quaternary latch and D-Type flip-flop with selective outputs

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Cited by 7 publications
(1 citation statement)
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“…The MIR consists of four 8‐bit D‐type data flip‐flops with memory function, 74LS273 [23], and there are 32 outputs in total at the time of the timing signal T2 ${T}_{2}$, a microinstruction read from the CM is inputted into the MIR until the next microinstruction is inputted. After a microinstruction is inputted into the MIR, the sequence control field and a part of the micro‐operation control field are directly decoded.…”
Section: Hardware Circuit Designmentioning
confidence: 99%
“…The MIR consists of four 8‐bit D‐type data flip‐flops with memory function, 74LS273 [23], and there are 32 outputs in total at the time of the timing signal T2 ${T}_{2}$, a microinstruction read from the CM is inputted into the MIR until the next microinstruction is inputted. After a microinstruction is inputted into the MIR, the sequence control field and a part of the micro‐operation control field are directly decoded.…”
Section: Hardware Circuit Designmentioning
confidence: 99%