High performance space VPX payload computing architecture study

Abstract

This paper describes a functional reference design for a high-performance payload processor that captures images and spectra from multiple high-resolution instruments, processes and integrates multiple real-time data streams to perform feature recognition and spatial transformations providing autonomous navigation and rendezvous capability for future spacecraft and is equally applicable to Unmanned Aerial Systems (UAS). The proposed design uses two new standards: VITA 78 (SpaceVPX) for multi-processor architecture, and RapidIO (RIO) as the interconnect fabric. The SpaceVPX standard specifies physical form factor, logical, and physical interconnect technologies and architectures that can lead to high-performance fault tolerant computing for high-performance payloads. An overview of SpaceVPX and its relationship to OpenVPX is provided as a guide to practical implementations. The proposed design features a generalpurpose host processor with GPU and FPGA-based image processing hardware. RIO is used for the instrument and processor interconnects, providing multiple gigabits per second of data communication capability. An overview of RIO features and operation is presented to complement the SpaceVPX architecture. A notional Reference Architecture is proposed for analysis using multiple methods for estimating avionics performance. The study objectives are to characterize throughput, latency and subsystem utilization using conventional system analysis, hardware prototype measurements and modeling and simulation software. We conducted first-order performance studies to identify bottlenecks in memory speed, I/O capacity and processing power. Initial performance analysis was performed on memory throughput rates, producing first-order values used as a performance baseline. A model of the Reference Architecture using VisualSim Architect was created and simulations run, producing insight into the complex interactions occurring between subsystems. Furthermore, the results of a prototype hardware implementation focusing on RIO throughput are presented as additional metrics. The study predicts RIO throughput between key elements of the Reference Architecture and identify major bottlenecks, and improvements needed for meeting mission requirements. The objective of this paper is to provide guidance to avionics designers regarding the adoption of SpaceVPX today and its anticipated evolution in the next few years.

Exploring Key Aspects of Soft GPGPU Computing for On-board Acceleration of Artificial Intelligence Algorithms in Space Applications

“…Focusing on space applications, there are currently no available GPUs that are Radiation-Hardened-By-Design (RHBD). Radiation-tolerant GPU-based systems, also capable of addressing embedded AI tasks, are available [12] (e.g., S-A1760 Venus, based on the NVIDIA Jetson TX2i GPU, and the SpaceVPX GPU Single Board Computer (SBC) [13]); however, even though they have been shown to achieve high performance (∼TFLOPS) at a remarkable level of energy efficiency, their use is limited to shorter-duration LEO and NEO programs and other short-term missions, as they cannot sustain higher levels of radiation. Commercial GPUs have been tested for radiation as well; in particular, the National Aeronautics and Space Administration (NASA) has conducted several studies on AMD and NVIDIA GPUs [14], [15].…”