High-Performance Ultralow-Temperature Polycrystalline Silicon TFT Using Sequential Lateral Solidification

Polysilicon thin-film transistors on polymer substrates

“…Lab (UK) [12,13] and followed by the groups at Lawrence Livermore National Lab. [14], Sony [15], Electronics and Telecommunications Research Institute (ETRI) [16][17][18], Samsung Advanced Institute of Technology (SAIT) [19][20][21], Korea Electronics Technology Institute (KETI) [22,23] and at University of Rennes [24,25], ultra-low-temperature polycrystalline silicon (ULTPS) devices were demonstrated. In particular, among the ultra-low T M substrates PES has been the most used [12,13,15,[17][18][19][20][21][22][23], for its excellent surface quality, optical transparency and relatively high maximum processing temperature (200-220 1C).…”

“…Such thermal treatments cannot be performed when using polymer substrates, being T M much lower than the required temperatures for de-hydrogenation. To circumvent this problem, sputter deposition of the a-Si precursor has been adopted, especially for ULTPS processes [14][15][16][17][18][19][20][21][22][23]26]. In fact, a-Si deposition by sputtering offers several advantages, including the possibility to suppress the H-content in the film, deposition of films at temperatures down to room temperature, ability to deposit directly doped films, eliminating the use of toxic/hazardous process gases.…”

“…Good quality silicon dioxide gate dielectrics deposited by RF sputtering of SiO 2 target in Ar/O 2 gas mixture and without intentional heating of the substrate have been also reported [24,25]. Plasma enhanced atomic layer deposition (PEALD) of Al 2 O 3 have been shown to provide high-quality gate insulators at very low temperatures ( o200 1C) [16][17][18]. In addition, the plasma oxidation of the polysilicon active layer prior the gate dielectric deposition has been shown to improve device characteristics, due to the formation of a highquality insulator/semiconductor interface with a reduced interface state density [18,26].…”

“…In the conventional self-aligned polysilicon TFT structure, the source-drain contact formation is normally obtained by using ion-implantation, auto-registered to the gate electrode, followed by dopant activation, which can be obtained by either thermal [48] or laser [16][17][18][19][20][21][22][23]26,29,30] annealing. While conventional ion implantation or ion-shower doping techniques can be easily applied when using polymer substrates [8,[16][17][18][19][20][21][22][23]26,[29][30][31][32]49], both dopant activation processes are problematic. In fact, thermal annealing requires temperatures (typically T44501C [48]) well above the polymer T M , while laser activation, which takes place after active layer island formation, imply UV irradiation of the polymer substrate.…”

Stabilization of Al2O3 gate oxide on plastic substrate for low temperature poly-silicon by in situ plasma treatment

“…In several published works, it was reported that the Al 2 O 3 thin films grown by plasma enhanced atomic layer deposition (PEALD) at less than 200°C have excellent electrical properties, such as a high dielectric constant of $8 (compared with $3.9 for SiO 2 ), low leakage current, high breakdown strength and good thermo-dynamical stability when in contact with Si [2,3]. Also, the Al 2 O 3 films deposited by the low-temperature PEALD are suitable for TFTs on plastic (polymer) substrates used in liquid crystal display (LCD) technology [3]. For the film growth of dielectric materials including Al 2 O 3 films, ALD provides an attractive alternative and offers a conformal deposition, high film density, and precise control of film thickness [4,5].…”