2008
DOI: 10.1109/tns.2007.914320
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High Rate Photon Counting CT Using Parallel Digital PET Electronics

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Cited by 15 publications
(15 citation statements)
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“…The freed logic space was used in combination with boards mounted with slightly larger, footprint compatible FPGA devices to add a computed tomography (CT) histogramming module [6] for each channel. This consumes the entire remaining logic resources, but is necessary for implementing photon counting CT.…”
Section: Resultsmentioning
confidence: 99%
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“…The freed logic space was used in combination with boards mounted with slightly larger, footprint compatible FPGA devices to add a computed tomography (CT) histogramming module [6] for each channel. This consumes the entire remaining logic resources, but is necessary for implementing photon counting CT.…”
Section: Resultsmentioning
confidence: 99%
“…The new firmware implementation improves performance by using what was learned through the first firmware iteration and by leveraging algorithms studied and verified after its completion [4], [6], [10], [11].…”
Section: New Architecturementioning
confidence: 99%
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“…Although pile-up is not a major concern for the low count rates encountered in PET, it is a real challenge for photon counting CT [22]. Low dose requirements in molecular imaging arise from possible therapeutic effects on small animals [23].…”
Section: Pile-up and Dead Timementioning
confidence: 99%
“…Digital techniques employing noise filtering and amplitude tracking methods were designed to cope with high count rates while extracting the signal energy (Figs. 7 and 8) [22]. The algorithm's dead-time is limited only by the signal rise-time, and enables real-time energy histogramming even for low-energy photons.…”
Section: Pile-up and Dead Timementioning
confidence: 99%