High-resistivity with PN interface passivation in 22 nm FD-SOI technology for low-loss passives at RF and millimeter-wave frequencies

Nyssens, Lucas; Rack, Martin; Nabet, Massinissa; Schwan, C.; Zhao, Zhixing; Lehmann, Steffen; Herrmann, T.; Henke, D.; Kondrat, A.; Soonekindt, C.; Koch, Frieder; Kache, T.; Kini, D. P.; Zimmerhackl, O.; Allibert, F.; Aulnette, C.; Lederer, Dimitri; Raskin, Jean‐Pierre

doi:10.1016/j.sse.2023.108656

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High-resistivity with PN interface passivation in 22 nm FD-SOI technology for low-loss passives at RF and millimeter-wave frequencies

Cited by 3 publications

References 15 publications

Structure and RF performance evolution of polycrystalline silicon charge capture layer for advanced RF-SOI in in-situ annealing process

Structure and RF performance evolution of polycrystalline silicon charge capture layer for advanced RF-SOI in in-situ annealing process

Various RF Substrate Solutions for 22 nm FD-SOI Technology Targeting Cryogenic Applications

Substrate Noise Mitigation Using a High Resistivity Substrate: The Case of a 14 GHz VCO on 28nm FD-SOI CMOS

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