2017 IEEE 3rd International Forum on Research and Technologies for Society and Industry (RTSI) 2017
DOI: 10.1109/rtsi.2017.8065966
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High sensitivity, low noise front-end for long range capacitive sensors for tagless indoor human localization

Abstract: Capacitive sensors are used in many applications due to their multiple advantages, but typically up to distances comparable to sensor dimensions. We present the design and the experimental results of a self-contained long range capacitive sensor front-end that is based on phase modulation and is suitable for indoor human localization. The changes in reactance due to the changes in the sensor capacitance modulate the phase of a carrier frequency, which is then demodulated using a XOR gate as quadrature detector… Show more

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Cited by 6 publications
(3 citation statements)
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“…We measured that T 1 takes 36 CPU clock cycles and T 3 four cycles. Hence, for 16 MHz CPU clock frequency, we have: From Figure 12, the power consumption during the data transfer period T 1 and T 3 is given by: P data transfer = P CPU active + P GPIO MCU + P FPGA static + P FPGA dynamic + P GPIO FPGA (16) where P CPU active is the CPU power in active mode, P GPIO MCU is the power consumed by the GPIO pins of the parallel port of the CPU, P FPGA static is the FPGA static power, P FPGA dynamic is the FPGA dynamic power, and P GPIO FPGA is the power consumed by the FPGA GPIO pins used for the parallel bus.…”
Section: ) Parallel Communication With Fpgamentioning
confidence: 99%
See 1 more Smart Citation
“…We measured that T 1 takes 36 CPU clock cycles and T 3 four cycles. Hence, for 16 MHz CPU clock frequency, we have: From Figure 12, the power consumption during the data transfer period T 1 and T 3 is given by: P data transfer = P CPU active + P GPIO MCU + P FPGA static + P FPGA dynamic + P GPIO FPGA (16) where P CPU active is the CPU power in active mode, P GPIO MCU is the power consumed by the GPIO pins of the parallel port of the CPU, P FPGA static is the FPGA static power, P FPGA dynamic is the FPGA dynamic power, and P GPIO FPGA is the power consumed by the FPGA GPIO pins used for the parallel bus.…”
Section: ) Parallel Communication With Fpgamentioning
confidence: 99%
“…Capacitive sensing of conductive and dielectric properties of human body was also used for indoor person sensing [10], [11], identification [1], [12], and localization [13]- [16]. Machine learning algorithms, and especially neural networks (NNs) trained on the abstract signatures of targets can be used to improve sensor performance [17], [18].…”
Section: Introductionmentioning
confidence: 99%
“…Effectively reduces the noise that is occurred by the sensor transducer. To identifying the person multiple times frequency is passed on the person [17]. MAS render services based on RFID technology.…”
Section: Introductionmentioning
confidence: 99%