High-Speed, Analyzable Simulators

Greve, David; Wilding, Matthew; Hardin, David S.

doi:10.1007/978-1-4757-3188-0_8

Cited by 21 publications

(14 citation statements)

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“…McCarthy (1962) introduced the notion of operational semantics. Operational models have been extensively used in mechanical theorem proving, and are often lauded for clarity and concreteness (Greve et al, 2000). Furthermore, in executable logics, operational semantics facilitates validation of formal models by simulation against concrete design artifacts.…”

Section: Related Workmentioning

confidence: 99%

A Mechanical Analysis of Program Verification Strategies

et al. 2008

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Abstract.We analyze three proof strategies commonly used in deductive verification of deterministic sequential programs formalized with operational semantics. The strategies are: (i) stepwise invariants, (ii) clock functions, and (iii) inductive assertions. We show how to formalize the strategies in the logic of the ACL2 theorem prover. Based on our formalization, we prove that each strategy is both sound and complete. The completeness result implies that given any proof of correctness of a sequential program one can derive a proof in each of the above strategies. The soundness and completeness theorems have been mechanically checked with ACL2.

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Section: Related Workmentioning

confidence: 99%

A Mechanical Analysis of Program Verification Strategies

et al. 2008

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“…First, having an efficiently executable pipelined machine can be quite useful in industrial settings, as it makes it possible to have a single "golden" reference model that can be used both for simulation-based testing and for formal verification. For example, Rockwell Collins used ACL2 to develop, test, and validate executable, bit-and cycle-accurate microprocessor models that ran at close to C speeds [6]. Second, as mentioned in Section 2, it is crucial that the notion of refinement used for hardware-software co-verification preserves liveness properties.…”

Section: Hardware Verification That Enables Software Verificationmentioning

confidence: 99%

The Challenge of Hardware-Software Co-verification

Manolios

2008

Verified Software: Theories, Tools, Experiments

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Abstract. Building verified computing systems such as a verified compiler or operating system will require both software and hardware verification. How can we decompose such verification efforts into mostly separate tasks, one involving hardware and the other software? What theorems should we prove? What specification languages should we use? What tools should we build? To what extent can the process be automated? We address these issues, using as a running example our recent and on-going work on refinement-based pipelined machine verification.

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“…Operational models have been lauded for clarity and concreteness [1,7], and facilitate the validation of formal models by simulation [7,8]. However, performing code proofs with such models is cumbersome: defining an appropriate global invariant or clock function requires understanding of the effect of each transition on the machine state [1,9,2].…”

Section: Contributions Of This Papermentioning

confidence: 99%

“…All the examples presented have been verified in ACL2 using the macro mentioned above. We start with an assembly language Fibonacci program on a simple machine model called TINY [8]. The subsequent examples are JVM bytecodes compiled from Java for an operational model of the JVM in ACL2 called M5 [2].…”

Section: Applicationsmentioning

confidence: 99%

Verification Condition Generation Via Theorem Proving

Matthews

Moore

Ray

et al. 2006

Lecture Notes in Computer Science

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Abstract. We present a method to convert (i) an operational semantics for a given machine language, and (ii) an off-the-shelf theorem prover, into a high assurance verification condition generator (VCG). Given a program annotated with assertions at cutpoints, we show how to use the theorem prover directly on the operational semantics to generate verification conditions analogous to those produced by a custom-built VCG. Thus no separate VCG is necessary, and the theorem prover can be employed both to generate and to discharge the verification conditions. The method handles both partial and total correctness. It is also compositional in that the correctness of a subroutine needs to be proved once, rather than at each call site. The method has been used to verify several machine-level programs using the ACL2 theorem prover.

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High-Speed, Analyzable Simulators

Cited by 21 publications

References 0 publications

A Mechanical Analysis of Program Verification Strategies

A Mechanical Analysis of Program Verification Strategies

The Challenge of Hardware-Software Co-verification

Verification Condition Generation Via Theorem Proving

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