High Speed and High Resolution Self Biased Differential Amplifier based Latch Comparator

Abstract

In high speed ADC, comparator influences the overall performance of ADC directly. This paper describes a very high speed and high resolution preamplifier comparator. The comparator use a self biased differential amp to increase the output current sinking and sourcing capability. The threshold and width of the new comparator can be reduced to the millivolt (mV) range, the resolution and the dynamic characteristics are good. Based on UMC 0.18um CMOS process model, simulated results show the comparator can work under a 25dB gain, 55MHz speed and 210.10µW power . KeywordsHigh speed ADC, high speed comparator, high resolution and preamplifier latch comparator. .