2020 7th International Conference on Smart Structures and Systems (ICSSS) 2020

DOI: 10.1109/icsss49621.2020.9202333

|View full text |Cite

|

Sign up to set email alerts

|

High Speed Floating Point Multiply Accumulate Unit using Offset Binary Coding

Yasha Jyothi M Shirur³

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...

Introduction1

Citation Types

Supporting

0

Mentioning

1

Contrasting

0

Year Published

2021

2021

2024

2024

Publication Types

Select...

Other3

Article2

Book1

Relationship

Self Cite0

Independent6

Authors

Journals

Cited by 6 publications

(1 citation statement)

References 6 publications

Supporting

0

Mentioning

1

Contrasting

0

Order By: Relevance

“…There are some differences between the reduction circuit and accumulator [13][14][15][16], which are listed as follows:…”

Section: Introductionmentioning

confidence: 99%

A Novel Reduction Circuit Based on Binary Tree Path Partition on FPGAs

¹

,

²

,

³

et al. 2021

View full text Add to dashboard Cite

Due to high parallelism, field-programmable gate arrays are widely used as accelerators in engineering and scientific fields, which involve a large number of operations of vector and matrix. High-performance accumulation circuits are the key to large-scale matrix operations. By selecting the adder as the reduction operator, the reduction circuit can implement the accumulation function. However, the pipelined adder will bring challenges to the design of the reduction circuit. To solve this problem, we propose a novel reduction circuit based on binary tree path partition, which can simultaneously handle multiple data sets with arbitrary lengths. It divides the input data into multiple groups and sends them to different iterations for calculation. The elements belonging to the same data set in each group are added to obtain a partial result, and the partial results of the same data set are added to achieve the final result. Compared with other reduction methods, it has the least area-time product.

“…There are some differences between the reduction circuit and accumulator [13][14][15][16], which are listed as follows:…”

Section: Introductionmentioning

confidence: 99%

A Novel Reduction Circuit Based on Binary Tree Path Partition on FPGAs

¹

,

²

,

³

et al. 2021

View full text Add to dashboard Cite

Due to high parallelism, field-programmable gate arrays are widely used as accelerators in engineering and scientific fields, which involve a large number of operations of vector and matrix. High-performance accumulation circuits are the key to large-scale matrix operations. By selecting the adder as the reduction operator, the reduction circuit can implement the accumulation function. However, the pipelined adder will bring challenges to the design of the reduction circuit. To solve this problem, we propose a novel reduction circuit based on binary tree path partition, which can simultaneously handle multiple data sets with arbitrary lengths. It divides the input data into multiple groups and sends them to different iterations for calculation. The elements belonging to the same data set in each group are added to obtain a partial result, and the partial results of the same data set are added to achieve the final result. Compared with other reduction methods, it has the least area-time product.

Analysis of Multiply-Accumulate (MAC) Unit Using Convolution Neural Networks (CNN)

Mihiraamsh,

Anita

2024

Lecture Notes in Networks and Systems

View full text Add to dashboard Cite

No abstract

FIR Filter design using Urdhva Triyagbhyam based on Truncated Wallace and Dadda Multiplier as Basic Multiplication Unit

¹

,

²

,

³

et al. 2023

2023 IEEE 12th International Conference on Communication Systems and Network Technologies (CSNT)

View full text Add to dashboard Cite

No abstract

scite is a Brooklyn-based organization that helps researchers better discover and understand research articles through Smart Citations–citations that display the context of the citation and describe whether the article provides supporting or contrasting evidence. scite is used by students and researchers from around the world and is funded in part by the National Science Foundation and the National Institute on Drug Abuse of the National Institutes of Health.

Contact Info

customersupport@researchsolutions.com

10624 S. Eastern Ave., Ste. A-614

Henderson, NV 89052, USA

Product

Browser Extension Assistant by scite Citation Statement Search Reference Check Visualizations Dashboards Explore Journals Explore Organizations Explore Funders Embedding Badge Embedding Citation Search Pricing

Resources

Blog Help & FAQ Accessibility Statement API Terms For Universities & Governments For Researchers For Publishers For Corporate, Pharma & Enterprise Author Marketing Become an Affiliate Get an organization trial or quote scite Data & Services

About

News & Press Careers Read our Paper Coverage

This site is protected by reCAPTCHA and the Google Privacy Policy and Terms of Service apply.

Blog Terms and Conditions API Terms Privacy Policy Contact Cookie Preferences Do Not Sell or Share My Personal Information

Copyright © 2024 scite LLC. All rights reserved.

Made with 💙 for researchers

Part of the Research Solutions Family.